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TEA6323

NXP

Sound fader control circuit

INTEGRATED CIRCUITS DATA SHEET TEA6323T Sound fader control circuit Preliminary specification File under Integrated Cir...


NXP

TEA6323

File Download Download TEA6323 Datasheet


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INTEGRATED CIRCUITS DATA SHEET TEA6323T Sound fader control circuit Preliminary specification File under Integrated Circuits, IC01 1995 Dec 20 Philips Semiconductors Preliminary specification Sound fader control circuit FEATURES Source selector for three stereo and one differential stereo input for remote sources The differential stereo input works optional as a fourth stereo input and the common mode pin can be used as well as an additional mono input Interface for noise reduction circuits Interface for external equalizer Volume, balance and fader control Output at volume I for external booster Special loudness characteristic automatically controlled in combination with volume setting Bass control with equalizer filters Treble control Mute control at audio signal zero crossing Logic output to read mute status Fast mute control via I2C-bus QUICK REFERENCE DATA SYMBOL VCC ICC Vo(rms) Gv Gstep(vol) Gbass Gtreble Gstep(treble) (S+N)/N RR100 CMRR PARAMETER supply voltage supply current maximum output voltage level voltage gain step resolution (volume) bass control treble control step resolution (treble) signal-plus-noise to noise ratio VO = 2.0 V; Gv = 0 dB; unweighted ripple rejection common mode rejection ratio differential stereo input Vr(rms) < 200 mV; f = 100 Hz; Gv = 0 dB VCC = 8.5 V CONDITIONS − −86 − −18 −12 − − − 43 MIN. 7.5 VCC = 8.5 V; THD ≤ 0.1% − TYP. 8.5 26 2000 − 1 − − 1.5 105 75 53 Fast mute control via pin I2C-bus control for all fu...




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