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TDA9141 Dataheets PDF



Part Number TDA9141
Manufacturers NXP
Logo NXP
Description PAL/NTSC/SECAM decoder/sync processor
Datasheet TDA9141 DatasheetTDA9141 Datasheet (PDF)

INTEGRATED CIRCUITS DATA SHEET TDA9141 PAL/NTSC/SECAM decoder/sync processor Product specification File under Integrated Circuits, IC02 December 1992 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor FEATURES • Multistandard PAL, NTSC and SECAM • I2C-bus controlled • I2C-bus addresses can be selected by hardware • Alignment free • Few external components • Designed for use with baseband delay lines • Integrated video filters • CVBS or YC input with automatic d.

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INTEGRATED CIRCUITS DATA SHEET TDA9141 PAL/NTSC/SECAM decoder/sync processor Product specification File under Integrated Circuits, IC02 December 1992 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor FEATURES • Multistandard PAL, NTSC and SECAM • I2C-bus controlled • I2C-bus addresses can be selected by hardware • Alignment free • Few external components • Designed for use with baseband delay lines • Integrated video filters • CVBS or YC input with automatic detection • CVBS output • Vertical divider system • Two-level sandcastle signal • VA synchronization pulse (3-state) • HA synchronization pulse or clamping pulse CLP input/output • Line-locked clock output or stand-alone I2C-bus output port • Stand-alone I2C-bus input/output port • Colour matrix and fast YUV switch • Comb filter enable input/output with subcarrier frequency. GENERAL DESCRIPTION TDA9141 The TDA9141 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM decoder/sync processor. The TDA9141 has been designed for use with baseband chrominance delay lines, and has a combined subcarrier frequency/comb filter enable signal for communication with a PAL comb filter. The IC can process CVBS signals and Y/C input signals. The input signal is available on an output pin, in the event of a Y/C signal, it is added into a CVBS signal. The sync processor provides a two-level sandcastle, a horizontal pulse (CLP or HA pulse, bus selectable) and a vertical (VA) pulse. When the HA pulse is selected a line-locked clock (LLC) signal is available at the output port pin. A fast switch can select either the internal Y signal with the UV input signals, or YUV signals made of the RGB input signals. The RGB input signals can be clamped with either the internal or an external clamping signal (search tuning mode). Two pins with an input/output port and an output port of the I2C-bus are available. The I2C-bus address of the TDA9141 is hardware programmable. ORDERING INFORMATION EXTENDED TYPE NUMBER TDA9141 Note 1. SOT232-1; 1996 December 4. 32 PACKAGE PINS SDIL PIN POSITION MATERIAL plastic CODE SOT232(1) December 1992 2 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor TDA9141 December 1992 3 Fig.1 Block diagram. Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor QUICK REFERENCE DATA SYMBOL VCC ICC V26(p-p) V26(p-p) V22(p-p) V12 V14(p-p) V13(p-p) V10 V10 V11 V17 V16(p-p) supply current CVBS input voltage (peak-to-peak value) luminance input voltage (peak-to-peak value) chrominance burst input voltage (peak-to-peak value) luminance black-white output voltage U output voltage (peak-to-peak value) V output voltage (peak-to-peak value) sandcastle blanking voltage level sandcastle clamping voltage level VA output voltage HA output voltage LLC output voltage amplitude (peak-to-peak value) 0 to 100% saturation standard colour bar standard colour bar top sync - white top sync - white PARAMETER positive supply voltage CONDITIONS MIN. 7.2 − − − − − − − − − − − − − − − − TYP. 8.0 45 1.0 1.0 0.3 1.0 1.33 1.05 2.5 4.5 5.0 5.0 500 0.7 5.0 200 5.0 TDA9141 MAX. 8.8 − − − − − − − − − − − − − − − − UNIT V mA V V V V V V V V V V mV V V mV V V21,20 19(p-p) RGB input voltage (peak-to-peak value) Vclamp I/O Vsub V15,16 clamping pulse input/output voltage subcarrier output voltage amplitude (peak-to-peak value) O port output voltage December 1992 4 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor PINNING SYMBOL −(R−Y) −(B−Y) Uin Vin SCL SDA VCC DEC DGND SC VA Yout Vout Uout I/O PORT PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 TDA9141 DESCRIPTION chrominance output chrominance output chrominance U input chrominance voltage input serial clock input serial data input/output positive supply input digital supply decoupling digital ground sandcastle output vertical acquisition synchronization pulse luminance output chrominance V output chrominance U output input/output port output port/line-locked clock output clamping pulse/HA synchronization pulse input/output fast switch select input BLUE input GREEN input RED input I2C-bus address input (CVBS output) comb filter status input/output horizontal PLL filter chrominance input luminance/CVBS input analog ground filter reference decoupling colour PLL filter reference crystal input second crystal input SECAM reference decoupling O PORT/LLC 16 CLP/HA 17 F B G R ADDR (CVBS) Fscomb HPLL C Y/CVBS AGND FILTref CPLL XTAL Fig.2 Pin configuration. XTAL2 SECref 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 December 1992 5 Philips Semiconductors Product specification PAL/NTSC/SECAM decoder/sync processor FUNCTIONAL DESCRIPTION General The TDA9141 is an I2C-bus controlled, alignment-free PAL/NTSC/SECAM colour decoder/sync processor which has been designed for use with baseband chrominance delay lines. In the standard operating mode the I2C-bus address is 8A. If the address input is connected to the positive.


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