TDA8374AH

INTEGRATED CIRCUITS DATA SHEET TDA837x family I2C-bus controlled economy PAL/NTSC and NTSC TV-processors Preliminary specification File under Integrated Circuits, IC02 1997 Jul 01 Philips Semiconductors Preliminary specification I2C-bus controlled economy PAL/NTSC and NTSC TV-processors FEATURES Available in all ICs: Vision IF amplifier with high sensitivity and good figures for differential phase and gain PLL demodulator for the IF signal Alignment-free sound demodulator Flexible source selection with a CVBS input for the internal signal and Y/C or CVBS input for the external signal Audio switch The output signal of the CVBS (Y/C) switch is externally available Integrated chrominance trap and band-pass filters (auto-calibrated) Luminance delay line integrated A symmetrical peaking circuit in the luminance channel Black stretching of non-standard CVBS or luminance signals RGB control circuit with black current stabilization and white point adjustment Linear RGB inputs and fast blanking Horizontal synchronization with two control loops and alignment-free horizontal oscillator Slow start and slow stop of the horizontal drive pulses Vertical count-down circuit Vertical driver optimized for DC-coupled vertical output stages I2C-bus control of various functions Low dissipation Small amount of peripheral components compared with competition ICs. Table 1 TV receiver versions SDIP56 PACKAGE TV RECEIVERS ECONOMY PAL only PAL/NTSC (SECAM) NTSC T...