TMC2302A

www.fairchildsemi.com TMC2302A Image Manipulation Sequencer 40 MHz Features Asynchronous loading of control parameters Rapid (25ns per pixel) rotation, warping, panning, and scaling of images Three-dimensional image addressing capability General third-order polynomial transformations in two dimensions on-chip Three-dimensional transformation of up to order 1.5 also supported Flexible, user-configurable pixel datapath timing structure Static convolutional filtering of up to 16 x 16 Pixel (onepass), 256 x 256 pixel (two-pass) or 256 x 256 x 256 pixel (three-pass) windows User-selectable source image subpixel resolution of 2-8 to 2-16 Pin-compatible upgrade to TMC2302 24-bit (optional 36-bit) positioning precision within the source image space, 48-bit internal precision Low power CMOS process Available in a 120-pin Plastic Pin Grid Array and 120-lead Metric Quad Flat Pack Applications High-performance video special-effects generators Guidance systems Image recognition Robotics High-precision image registration Preliminary Information Description The TMC2302A, a pin-compatible replacement for the TMC2302, is a high-speed self-sequencing address generator which supports image manipulations such as rotation, rescaling, warping, filtering, and resampling. It remaps the pixel locations of a target (display) space back into those of a source image space. The degree and type of image manipulation is determined by the remapping selected. To remap from ...