V53C8128H

MOSEL-VITELIC V53C8128H ULTRA-HIGH PERFORMANCE, 128K X 8 BIT EDO PAGE MODE CMOS DYNAMIC RAM 35 35 ns 18 ns 14 ns 70 ns V53C8128H PRELIMINARY HIGH PERFORMANCE Max. RAS Access Time, (tRAC) Max. Column Address Access Time, (tCAA) Min. Fast Page Mode With EDO Cycle Time, (tPC) Min. Read/Write Cycle Time, (tRC) 40 40 ns 20 ns 15 ns 75 ns 45 45 ns 22 ns 17 ns 80 ns 50 50 ns 24 ns 19 ns 90 ns Features s 128K x 8-bit organization s RAS access time: 35, 40, 45, 50 ns s EDO Page Mode supports sustained I/O data rates up to 71.5 MHz s Low power dissipation V53C8128H-50 — Operating Current – 135 mA max — TTL Standby Current – 2.0 mA max s Low CMOS Standby Current V53C8128H – 1.0 mA max s Read-Modify-Write, RAS-Only Refresh, CAS-Before-RAS Refresh capability s Refresh Interval V53C8128H – 512 cycles/8 ms s Available in 26/24 pin 300 mil SOJ package Description The V53C8128H is a high speed 131,072 x 8 bit CMOS dynamic random access memory. The V53C8128H offers a combination of features: EDO Page Mode for high data bandwidth, fast usable speed, CMOS standby current. All inputs and outputs are TTL compatible. Input and output capacitances are significantly lowered to allow increased system performance. Page Mode with extended data out operation allows random access of up to 256 columns (x8) bits within a row with cycle times as short as 14 ns. Because of static circuitry, the CAS clock is not in the critical timing path. The flow-through column address latches allow address pi...