T1/E1 System Synchronizer
ZL30100 T1/E1 System Synchronizer
Data Sheet
Features
April 2010
• Supports Telcordia GR-1244-CORE Stratum 4 and Str...
Description
ZL30100 T1/E1 System Synchronizer
Data Sheet
Features
April 2010
Supports Telcordia GR-1244-CORE Stratum 4 and Stratum 4E
Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces
Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces
Ordering Information
ZL30100QDG1 64 Pin TQFP* Trays, Bake & Drypack *Pb Free Matte Tin -40°C to +85°C
Simple hardware control interface
Accepts two input references and synchronizes to any combination of 8 kHz, 1.544 MHz, 2.048 MHz, 8.192 MHz or 16.384 MHz inputs
Less than 0.6 nspp intrinsic jitter on all output clocks
External master clock source: clock oscillator or crystal
Provides a range of clock outputs: 1.544 MHz, 2.048 MHz, 16.384 MHz and either 4.096 MHz and 8.192 MHz or 32.768 MHz and 65.536 MHz
Hitless reference switching between any combination of valid input reference frequencies
Provides 5 styles of 8 kHz framing pulses Holdover frequency accuracy of 1.5 x 10-7
Lock, Holdover and selectable Out of Range indication
Applications
Synchronization and timing control for multi-trunk DS1/E1 systems such as DSLAMs, gateways and PBXs
Clock and frame pulse source for ST-BUS, GCI and other time division multiplex (TDM) buses
Line Card synchronization for PDH systems
Selectable loop filter bandwidth of 1.8 Hz or 922 Hz
REF0 REF1
REF_FAIL0 REF_FAIL1
OOR_SEL
REF_SEL RST
OSCi OSCo TIE_CLR
BW_SEL LOCK OUT_SEL
Master Clock
MUX
TIE Corrector
Circuit
Virtual Referenc...
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