Document
Data Sheet No. PD60172 Rev.G
IR2181(4)(S) & (PbF)
HIGH AND LOW SIDE DRIVER
Features
• Floating channel designed for bootstrap operation • • • • • • • •
Fully operational to +600V Tolerant to negative transient voltage dV/dt immune Gate drive supply range from 10 to 20V Undervoltage lockout for both channels 3.3V and 5V input logic compatible Matched propagation delay for both channels Logic and power ground +/- 5V offset. Lower di/dt gate driver for better noise immunity Output source/sink current capability 1.4A/1.8A Also available LEAD-FREE (PbF)
Packages
8-Lead PDIP IR2181 14-Lead PDIP IR21814
8-Lead SOIC IR2181S
14-Lead SOIC IR21814S
IR2181/IR2183/IR2184 Feature Comparison
Description
Part
The IR2181(4)(S) are high voltage, 2181 COM high speed power MOSFET and IGBT HIN/LIN no none 180/220 ns 21814 VSS/COM drivers with independent high and low 2183 Internal 500ns COM HIN/LIN yes 180/220 ns side referenced output channels. Pro21834 Program 0.4 ~ 5 us VSS/COM 2184 Internal 500ns COM prietary HVIC and latch immune IN/SD yes 680/270 ns 21844 Program 0.4 ~ 5 us VSS/COM CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 600 volts.
Input logic
Crossconduction prevention logic
Dead-Time
Ground Pins
Ton/Toff
Typical Connection
up to 600V V CC
V CC
HIN LIN
VB HO VS LO
TO LOAD
HIN LIN COM
IR2181 IR21814
HO VCC
HIN LIN
up to 600V
VCC HIN LIN
VB VS TO LOAD
(Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
VSS
VSS
COM LO
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1
IR2181(4) (S) & (PbF)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB VS VHO VCC VLO VIN VSS dVS/dt PD
Definition
High side floating absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (HIN & LIN - IR2181/IR21814) Logic ground (IR21814 only) Allowable offset supply voltage transient Package power dissipation @ TA ≤ +25°C (8-lead PDIP) (8-lead SOIC) (14-lead PDIP) (14-lead SOIC)
Min.
-0.3 VB - 25 VS - 0.3 -0.3 -0.3 VSS - 0.3 VCC - 25 — — — — — — — — — — -50 —
Max.
625 VB + 0.3 VB + 0.3 25 VCC + 0.3 VSS + 10 VCC + 0.3 50 1.0 0.625 1.6 1.0 125 200 75 120 150 150 300
Units
V
V/ns
W
RthJA
Thermal resistance, junction to ambient
(8-lead PDIP) (8-lead SOIC) (14-lead PDIP) (14-lead SOIC)
°C/W
TJ TS TL
Junction temperature Storage temperature Lead temperature (soldering, 10 seconds)
°C
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at 15V differential.
Symbol
VB VS VHO VCC VLO VIN VSS TA
Definition
High side floating supply absolute voltage High side floating supply offset voltage High side floating output voltage Low side and logic fixed supply voltage Low side output voltage Logic input voltage (HIN & LIN - IR2181/IR21814) Logic ground (IR21814/IR21824 only) Ambient temperature
Min.
VS + 10 Note 1 VS 10 0 VSS -5 -40
Max.
VS + 20 600 VB 20 VCC VSS + 5 5 125
Units
V
°C
Note 1: Logic operational for VS of -5 to +600V. Logic state held for VS of -5V to -VBS. (Please refer to the Design Tip DT97-3 for more details). Note 2: HIN and LIN pins are internally clamped with a 5.2V zener diode.
2
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IR2181(4) (S) & (PbF)
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM, CL = 1000 pF, TA = 25°C.
Symbol
ton toff MT tr tf
Definition
Turn-on propagation delay Turn-off propagation delay Delay matching, HS & LS turn-on/off Turn-on rise time Turn-off fall time
Min.
— — — — —
Typ.
180 220 0 40 20
Max. Units Test Conditions
270 330 35 60 35 nsec VS = 0V VS = 0V VS = 0V VS = 0V or 600V
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V, VSS = COM and TA = 25°C unless otherwise specified. The VIL, VIH and IIN parameters are referenced to VSS/COM and are applicable to the respective input leads HIN and LIN. The VO, IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Symbol
VIH VIL VOH VOL ILK IQBS IQCC IIN+ IINVCCUV+ VBSUV+ VCCUVVBSUVVCCUVH VBSUVH IO+ IO-
Definition
Logic “1” input voltage (IR2181/IR21814 ) Logic “0” input voltage (.