Document
P-Channel 20-V (D-S) MOSFET
Si2321DS
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) (Ω)
0.057 at VGS = - 4.5 V - 20 0.076 at VGS = - 2.5 V
0.110 at VGS = - 1.8 V
ID (A) - 3.3 - 2.8 - 2.3
TO-236 (SOT-23)
G1 S2
3D
FEATURES • Halogen-free Option Available • TrenchFET® Power MOSFETS
APPLICATIONS • Load Switch • PA Switch
Top View Si2321DS *(D1) * Marking Code
Ordering Information: Si2321DS-T1-E3 (Lead (Pb)-free) Si2321DS-T1-GE3 (Lead (Pb)-free and Halogen-free)
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
5s
Steady State
Drain-Source Voltage
VDS - 20
Gate-Source Voltage
VGS
±8
Continuous Drain Current (TJ = 150 °C)a
TA = 25 °C TA = 70 °C
ID
- 3.3 - 2.6
- 2.9 - 2.3
Pulsed Drain Current
IDM - 12
Continuous Source Current (Diode Conduction)a
IS
- 0.74
- 0.59
Power Dissipationa
TA = 25 °C TA = 70 °C
PD
0.89 0.71 0.57 0.45
Operating Junction and Storage Temperature Range
TJ, Tstg
- 55 to 150
RoHS
COMPLIANT
Unit V A W °C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Foot (Drain) Notes: a. Surface Mounted on FR4 board. b. t ≤ 5 s.
t≤5s Steady State Steady State
Symbol RthJA RthJF
Typical 115 140 60
For SPICE model information via the Worldwide Web: http://www.vishay.com/www/product/spice.htm
Document Number: 72210 S-80642-Rev. B, 24-Mar-08
Maximum 140 175 75
Unit °C/W
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Si2321DS
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Static
Drain-Source Breakdown Voltage Gate-Threshold Voltage Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Currenta
V(BR)DSS VGS(th)
IGSS
IDSS
ID(on)
VGS = 0 V, ID = - 10 µA VDS = VGS, ID = - 250 µA VDS = 0 V, VGS = ± 8 V
VDS = 16 V, VGS = 0 V VDS = 16 V, VGS = 0 V, TJ = 55 °C
VDS ≤ - 5 V, VGS = - 4.5 V
Drain-Source On-Resistancea
Forward Transconductancea Diode Forward Voltage Dynamicb
RDS(on)
gfs VSD
VGS = - 4.5 V, ID = - 3.3 A VGS = - 2.5 V, ID = - 2.8 A VGS = - 1.8 V, ID = - 2.3 A VDS = - 5 V, ID = - 3.3 A
IS = - 1.6 A, VGS = 0 V
Total Gate Charge Gate-Source Charge Gate-Drain Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Switchingb
Qg Qgs Qgd Ciss Coss Crss
VDS = - 6 V, VGS = - 4.5 V ID ≅ - 3.3 A
VDS = - 6 V, VGS = 0 V, f = 1 MHz
Turn-On Time Turn-Off Time
td(on) tr
td(off) tf
VDD = - 6 V, RL = 6 Ω ID ≅ - 1.0 A, VGEN = - 4.5 V
RG = 6 Ω
Notes:
a. For DESIGN AID ONLY, not subject to production testing. b. Pulse test: PW ≤ 300 µs, duty cycle ≤ 2 %.
c. Switching time is essentially independent of operating temperature.
Min.
Limits Typ.
Max.
- 20 - 0.40
-6
0.044 0.061 0.084
3
- 0.90 ± 100
-1 - 10
0.057 0.076 0.110
- 1.2
Unit
V nA µA A
Ω
S V
8 13 1.2 2.2 715 170 120
nC pF
15 25 35 55
ns 60 90 40 60
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at.