SL4015B

SL4015B Dual 4-Stage Static Shift Register High-Voltage Silicon-Gate CMOS The SL4015B consists of two identical, independent, 4-stage serialinput/parallel-output registers. Each register has independent CLOCK and RESET inputs as well as a single serial DATA input. “Q” outputs are available from each of the four stages on both registers. All register stages are D-type, master-slave flip-flops. The logic level present at the DATA input is transferred into the first register stage and shifted over one stage at each positive-going clock transition. Resetting of all stages is accomplished by a high level on the reset line. Register expansion to 8 stages using one SL4015B package, or to more than 8 stages using additional SL4015B’s is possible. Operating Voltage Range: 3.0 to 18 V Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply ORDERING INFORMATION SL4015BN Plastic SL4015BD SOIC TA = -55° to 125° C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs Clock Data L H PIN 16=VCC PIN 8= GND 2.5 V min @ 15.0 V supply X X X Reset L L L H Outputs Q1 L H Qn Qn-1 Qn-1 No change L L X = don’t care SLS System Logic Semiconductor SL4015B MAXIMUM RATINGS * Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to ...