Differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator
SK10/100ELT21W
Differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator
HIGH-PERFORMANCE PRODUCTS Description
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Description
SK10/100ELT21W
Differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator
HIGH-PERFORMANCE PRODUCTS Description
The SK10/100ELT21W is a single differential PECL to CMOS/TTL or LVPECL to LVCMOS/LVTTL Translator. Since PECL (Positive ECL) levels are used, only +VCC and ground are required. The small outline, 8 lead SOIC package, low skew, and the single gate design of the SK10/100ELT21W makes it ideal for applications which require the translation of a clock and a data signal. Unlike the TTL totem pole outputs, the outputs of the ELT21W can be interfaced directly to CMOS inputs with better VOH (VCC – 0.5V) levels. With extended supply voltage capability, the device is functionally compatible with MC10/100ELT21 (5V) and MC10/100LVELT21 (3.3V).
Features
Extended Supply Voltage Range (VCC = +3.0V to 5.5V) 2.4 ns Typical Propagation Delay Differential PECL Inputs True Complementary CMOS/TTL Output Flow Through Pinouts Functionally compatible with MC10/100ELT21 and MC10/100LVELT21 75KW Internal Input Pulldown Resistors Specified Over Industrial Temperature Range: –40 oC to 85oC ESD Protection of >4000V Small Outline 8 Lead SOIC (150 mils) Package Flammability Rate: UL-94 code V-0 Moisture Sensitivity: Level 1
Functional Block Diagram
PIN Names
Pin QO Function CMOS/TTL Output Differential PECL Inputs Referenced Voltage Output +VCC Supply Ground No Connect
NC
1
8
VCC
D0, D0* VBB VCC
D0
2
TTL
7
Q0
GND NC
PECL
D0*
3
6
NC
VBB
4
5
GND...
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