K9F6408U0A-TIB0

K9F6408U0A-TCB0, K9F6408U0A-TIB0 Document Title 8M x 8 Bit NAND Flash Memory FLASH MEMORY Revision History Revision No. History 0.0 0.1 0.2 Initial issue. 1. Revised real-time map-out algorithm(refer to technical notes) Changed device name 1) KM29U64000AT -> K9F6408U0A-TCB0 2) KM29U64000AIT -> K9F6408U0A-TIB0 Changed the following items ITEM Program Time Number of partial program in the same page Before(M-die) 1,000us(Max.) 10 Cycles After(A-die) 500us(Max.) Main Array: 2 Cycles Spare Array: 3 Cycles Draft Date April 10th 1999 July 23th 1999 Sep. 15th 1999 Remark Preliminary Preliminary Preliminary 0.3 Changed the following items ITEM Pin Configuration(23th Pin) Absolute maximum Ratings - Voltage on any pin relative to Vss Recommended operating conditions - Supply voltage Before(M-die) VccQ Vin : -0.6V to 6V Vcc : -0.6V to 4.6V VccQ : -0.6V to 6V VccQ : 2.7V(Min.) / 5.5V(Max.) I/O pins : 2.0V(Min.) VccQ+0.3V(Max.) Except I/O pins : 2.0V(Min.) / Vcc+0.3V(Max.) 0.8V and 2.0V After(A-die) Vcc Vin : -0.6V to 4.6V Vcc : -0.6V to 4.6V Oct. 20th 1999 Preliminary Do not support VccQ DC and operating characteristics - Input high voltage(VIH) All inputs : 2.0V(Min.) / Vcc+0.3V(Max.) Input and output timing levels 1.5V 0.4 Changed the following item ITEM Data transfer from Cell to Register (tR) Before(M-die) 7us(Max.) After(A-die) 10us(Max.) Jan. 10th 2000 Final 0.5 1. Changed invalid block(s) marking method prior to shipping - The invalid block(s) information is writ...