K4S160822D

K4S160822D CMOS SDRAM 2Mx8 SDRAM 1M x 8bit x 2 Banks Synchronous DRAM LVTTL Revision 1.0 October 1999 Samsung Electronics reserves the right to change products or specification without notice. -1- Rev. 1.0 (Oct. 1999) K4S160822D Revision History Revision 1.0 (October 1999) CMOS SDRAM -2- Rev. 1.0 (Oct. 1999) K4S160822D 1M x 8Bit x 2 Banks Synchronous DRAM FEATURES JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Dual banks operation MRS cycle with address key programs -. CAS latency ( 2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave) All inputs are sampled at the positive going edge of the system clock Burst read single-bit write operation DQM for masking Auto & self refresh 15.6us refresh duty cycle(2K/32ms) CMOS SDRAM GENERAL DESCRIPTION The K4S160822D is 16,777,216 bits synchronous high data rate Dynamic RAM organized as 2 x 1,048,576 words by 8 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system applications. ORDERING INFORMATION Part No. K4S160822DT-G/F7 K4S160822DT-G/F8 K4S160822DT-G/FH K4S160822DT-G/FL K4S160822DT-G/F10 Max Freq. 143MHz 125MHz 100MHz 10...