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S3P72C8 Dataheets PDF



Part Number S3P72C8
Manufacturers Samsung semiconductor
Logo Samsung semiconductor
Description The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsungs newest 4-bit CPU core/ SAM47 (Samsung Arrangeable M
Datasheet S3P72C8 DatasheetS3P72C8 Datasheet (PDF)

S3C72C8/P72C8 PRODUCT OVERVIEW 1 OVERVIEW PRODUCT OVERVIEW The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-96-dot LCD direct drive capability flexible 16-bit timer/counter, and 4-chanel comparator, the S3C72C8 offers an excellent design solution for a low CDP and a card reader. Up to 28 pins of the 44-pin QFP or up to 26 pins of the 42-pin SDIP package can be.

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S3C72C8/P72C8 PRODUCT OVERVIEW 1 OVERVIEW PRODUCT OVERVIEW The S3C72C8 single-chip CMOS microcontroller has been designed for high performance using Samsung's newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers). With an up-to-96-dot LCD direct drive capability flexible 16-bit timer/counter, and 4-chanel comparator, the S3C72C8 offers an excellent design solution for a low CDP and a card reader. Up to 28 pins of the 44-pin QFP or up to 26 pins of the 42-pin SDIP package can be dedicated to I/O. Eight vectored interrupts provide fast response to internal and external events. In addition, the S3C72C8's advanced CMOS technology provides for low power consumption. OTP The S3C72C8 microcontroller is also available in OTP (One Time Programmable) version, S3P72C8. S3P72C8 microcontroller has an on-chip 8K-byte one-time-programable EPROM instead of masked ROM. The S3P72C8 is comparable to S3C72C8, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW S3C72C8/P72C8 FEATURES Memory • • 512 × 4-bit RAM (including LCD display RAM) 8,192 × 8-bit ROM Interrupts • • • Four internal vectored interrupts Five external vectored interrupts Two quasi-interrupts 28 I/O Pins • • I/O: 26 pins (44-pin QFP, 42-pin SDIP) Output only: 2 pins (44-pin QFP) Bit Sequential Carrier • Supports 16-bit serial data transfer in arbitrary format LCD Controller/Driver • • • 12 segments and 8 common terminals (3, 4, and 8 common selectable) Internal resistor circuit for LCD bias All dot can be switched on/off Memory-Mapped I/O Structure • Data memory bank 15 Power-Down Modes • • • Idle mode (only CPU clock stops) Stop mode (main system oscillation stops) Sub system clock stop mode 8-bit Basic Timer • • 4 interval timer functions Watch-dog timer Oscillation Sources • • • • • Crystal, ceramic, or RC for main system clock Crystal oscillator for subsystem clock Main system clock frequency: 0.4 MHz-6 MHz Subsystem clock frequency: 32.768 kHz CPU clock divider circuit (by 4, 8, or 64) 16-bit Timer/Counter 1 • • • • • • Programmable 16-bit timer/counter Arbitrary clock output External event counter External clock signal divider Configurable as two 8-bit timer/counters Serial I/O interface clock generator Instruction Execution Times • • • 0.67, 1.33, 10.7 µs at 6 MHz (main) 0.95, 1.91, 15.3 µs at 4.19 MHz (main) 122 µs at 32.768 kHz (subsystem) Watch Timer • • • Time interval generation: 0.5 s, 3.9 ms at 32768 Hz Four frequency outputs to BUZ pin Clock source generation for LCD Operating Temperature • – 40 °C to 85 °C 8-bit Serial I/O Interface • • • • 8-bit transmit/receive mode 8-bit receive mode LSB-first or MSB-first transmission selectable Internal or external clock source Operating Voltage Range • 1.8 V to 5.5 V Package Type • 44-pin QFP, 42-pin SDIP Comparator • • 4 channel mode: internal reference (4-bit resolution) 3 channel mode: external reference 1-2 S3C72C8/P72C8 PRODUCT OVERVIEW BLOCK DIAGRAM 8-Bit Timer/ Counter1A 8-Bit Timer/ .


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