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ILX508A Dataheets PDF



Part Number ILX508A
Manufacturers Sony Corporation
Logo Sony Corporation
Description 7926-pixel CCD Linear Image Sensor
Datasheet ILX508A DatasheetILX508A Datasheet (PDF)

ILX508A 7926-pixel CCD Linear Image Sensor (B/W) For the availability of this product, please contact the sales office. Description The ILX508A is a reduction type CCD linear sensor developed for high resolution copiers. This sensor reads A3-size documents at a density of 600 DPI (Dot Per Inch). A built-in timing generator and clock-drivers ensure direct drive at 5V logic for easy use. In addition reset pulse can switch between internal generation and external input. Features • Number of effecti.

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ILX508A 7926-pixel CCD Linear Image Sensor (B/W) For the availability of this product, please contact the sales office. Description The ILX508A is a reduction type CCD linear sensor developed for high resolution copiers. This sensor reads A3-size documents at a density of 600 DPI (Dot Per Inch). A built-in timing generator and clock-drivers ensure direct drive at 5V logic for easy use. In addition reset pulse can switch between internal generation and external input. Features • Number of effective pixels: 7926 pixels • Pixel size: 7µm × 7µm (7µm pitch) • Built-in timing generator and clock-drivers • Ultra high sensitivity • Ultra low lag/low dark voltage • Output method • Maximum operating frequency: 12.5MHz Absolute Maximum Ratings • Supply voltage VDD1 VDD2 • Operation temperature • Storage temperature Pin Configuration (Top View) 24 pin DIP (Ceramic) 11 6 –10 to +60 –30 to +80 VGG GND VDD1 VOUT GND φROG VDD2 VDD2 RSSW 1 2 3 4 5 6 7 8 9 V V °C °C 1 24 φCLK 23 VDD1 22 RS/SH 21 VDD1 20 VDD1 19 GND 18 VDD2 17 GND 16 T4 15 T3 7926 14 T2 13 NC T1 10 GND 11 NC 12 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E96X33-PS Block Diagram VDD1 23 21 20 17 16 15 14 19 18 13 VDD1 VDD1 GND VDD2 GND T4 T3 T2 NC Clock-drivers CCD analog shift register Read out gate S1 S2 D18 D115 D99 S7925 • Output amplifier • Sample-and-hold circuit • Feed through suppression circuit S7926 D116 –2– Read out gate CCD analog shift register Clock-drivers Clock-pulse generator Sample-and-hold pulse generator 5 7 VDD2 VDD2 8 GND 24 φCLK 9 RSSW 22 RS/SH 4 D17 D98 VOUT 12 NC VGG 1 Mode selector Read out gate pulse generator 2 3 10 T1 11 GND 6 φROG GND VDD1 ILX508A ILX508A Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol VGG GND VDD1 VOUT GND φROG VDD2 VDD2 RSSW∗ T1 GND NC NC T2 T3 T4 GND VDD2 GND VDD1 VDD1 RS/SH∗ VDD1 φCLK Description Output circuit gate bias GND 9V power supply Signal output GND Clock pulse 5V power supply 5V power supply RS pulse external, internal selection (External RS → VDD1, Internal RS → GND) Test pin (5V) GND NC NC Test pin (GND) Test pin (5V) Test pin (GND) GND 5V power supply GND 9V power supply 9V power supply Clock pulse or S/H switch 9V power supply Clock pulse ∗ Output mode is changeable as follows. 22pin 9pin GND VDD1 GND Internal RS without S/H — VDD1 Internal RS with S/H — φRS — External RS without S/H –3– ILX508A Recommended Voltage Item VDD1 VDD2 Min. 8.5 4.75 Typ. 9.0 5.0 Max. 9.5 5.25 Unit V V Note) Rules for raising and lowering power supply voltage. To raise power supply voltage, first raise VDD1 (9V) and then VDD2 (5V). To lower voltage, first lower VDD2 (5V) and then VDD1 (9V). Clock Characteristics Item Input capacity of φCLK Input capacity of φROG Input capacity of RS/SH φCLK frequency φRS frequency Symbol CφCLK CφROG C RS/SH fφCLK fφRS Min. — — — — — Typ. 10 10 10 1 1 Max. — — — 12.5 12.5 Unit pF pF pF MHz MHz –4– ILX508A Electrooptical Characteristics∗1 (Ta = 25°C, VDD1 = 9V, VDD2 = 5V, Light source = 3200K, φCLK = 1MHz, Internal φRS mode without S/H, IR cut filter, CM-500S (t = 1.0mm)) Item Sensitivity1 Sensitivity2 Sensitivity nonuniformity Saturation output voltage Saturation exposure Even and odd black level DC difference Dark voltage average Dark signal nonuniformity Image lag 9V supply current 5V supply current Total transfer efficiency Output impedance Offset level Dynamic range Symbol R1 R2 PRNU VSAT SE ∆V VDRK DSNU IL IVDD1 IVDD2 TTE ZO VOS DR Min. 7.5 — — 1.0 0.072 — — — — — — 90 — — 500 Typ. 10.8 24.6 5 1.5 0.139 1.0 0.3 0.6 0.02 16 5 97 600 3.0 5000 Max. 13.9 — 12.5 — — 10.0 2 5 — 32 16 — — — — Unit V/(lx · s) V/(lx · s) % V lx · s mV mV mV % mA mA % Ω V — Remarks ∗2 ∗3 ∗4 ∗5 ∗6 ∗7 ∗8 ∗9 ∗10 — — — — ∗11 ∗12 ∗1 In accorcance with the given electrooptical characteristics, the even black level is defined as the mean value of D8, D10, D12, D14, and D16. ∗2 For the sensitivity test light is applied with a uniform intensity of illumination. ∗3 W lamp (2854K). ∗4 PRNU is defined as indicated below. Ray incidence conditions are the same as for ∗2. PRNU = (VMAX – VMIN)/2 × 100 [%] VAVE ∗5 ∗6 Where the 7926 pixels are divided into blocks of 102, even and odd pixels, respectively (Even and odd last blocks are 87.) The maximum output of each block is set to VMAX, the minimum output to VMIN and the average output to VAVE. Use below the minimum value of the saturation output voltage. Saturation exposure is defined as follows. SE = VSAT R1 ∗7 Indicates the DC difference in value between odd black level and even black level. ∗8 optical signal accumulated time τ .


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