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74AC139 Dataheets PDF



Part Number 74AC139
Manufacturers Fairchild Semiconductor
Logo Fairchild Semiconductor
Description Dual 1-of-4 Decoder/Demultiplexer
Datasheet 74AC139 Datasheet74AC139 Datasheet (PDF)

74AC138 • 74ACT138 1-of-8 Decoder/Demultiplexer November 1988 Revised August 2000 74AC138 • 74ACT138 1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC/ACT138 devices or a 1-of-32 decoder using four AC/ACT138 devices and one inverter. Features s ICC reduce.

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74AC138 • 74ACT138 1-of-8 Decoder/Demultiplexer November 1988 Revised August 2000 74AC138 • 74ACT138 1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder using just three AC/ACT138 devices or a 1-of-32 decoder using four AC/ACT138 devices and one inverter. Features s ICC reduced by 50% s Demultiplexing capability s Multiple input enable for easy expansion s Active LOW mutually exclusive outputs s Outputs source/sink 24 mA s ACT138 has TTL-compatible inputs Ordering Code: Order Number 74AC138SC 74AC138SJ 74AC138MTC 74AC138PC 74ACT138SC 74ACT138SJ 74ACT138PC Package Number M16A M16D MTC16 N16E M16A M16D N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Connection Diagram Logic Symbols IEEE/IEC Pin Descriptions Pin Names A0–A2 E1–E2 E3 O0–O7 Description Address Inputs Enable Inputs Enable Input Outputs FACT is a trademark of Fairchild Semiconductor Corporation. © 2000 Fairchild Semiconductor Corporation DS009925 www.fairchildsemi.com 74AC138 • 74ACT138 Truth Table Inputs E1 H X X L L L L L L L L H = HIGH Voltage Level Outputs A1 X X X L L H H L L H H A2 X X X L L L L H H H H O0 H H H L H H H H H H H O1 H H H H L H H H H H H O2 H H H H H L H H H H H O3 H H H H H H L H H H H O4 H H H H H H H L H H H O5 H H H H H H H H L H H O6 H H H H H H H H H L H O7 H H H H H H H H H H L E2 X H X L L L L L L L L E3 X X L H H H H H H H H A0 X X X L H L H L H L H L = LOW Voltage Level X = Immaterial Functional Description The AC/ACT138 high-speed 1-of-8 decoder/demultiplexer accepts three binary weighted inputs (A0, A1, A2) and, when enabled, provides eight mutually exclusive activeLOW outputs (O0–O7). The AC/ACT138 features three Enable inputs, two active-LOW (E1, E2) and one activeHIGH (E3). All outputs will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four AC/ACT138 devices and one inverter (see Figure 1). The AC/ACT138 can be used as an 8-output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active-HIGH or active-LOW state. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. FIGURE 1. Expansion to 1-of-32 Decoding www.fairchildsemi.com 2 74AC138 • 74ACT138 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI = −0.5V VI = VCC + 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO = −0.5V VO = VCC + 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) PDIP 140°C −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150 °C Recommended Operating Conditions Supply Voltage (VCC) AC ACT Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate (∆V/∆t) AC Devices VIN from 30% to 70% of VCC VCC @ 3.3V, 4.5V, 5.5V Minimum Input Edge Rate (∆V/∆t) ACT Devices VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications. 2.0V to 6.0V 4.5V to 5.5V 0V to VCC 0V to VCC −40°C to +85°C 125 mV/ns DC Electrical Characteristics for AC Symbol VIH Parameter Minimum HIGH Level Input Voltage VIL Maximum LOW Level Input Voltage VOH Minimum HIGH Level Output Voltage VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Maximum LOW Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 IIN (Note 4) IOLD IOHD ICC (Note 4) Maximum Input Leakage Current Minimum Dynamic Output Current (Note 3) Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 4.0 0.002 0.001 0.001 TA = +25°C Typ 1.5 2.2.


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