74AC11

www.DataSheet4U.net 74AC11 TRIPLE 3-INPUT AND GATE PRELIMINARY DATA s s s s s s s s s HIGH SPEED: tPD = 4 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA = 25 oC HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 11 IMPROVED LATCH-UP IMMUNITY B M (Plastic Package) (Micro Package) ORDER CODES : 74AC11B 74AC11M wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. The internal circuit is composed of 4 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. DESCRIPTION The AC11 is an advanced high-speed CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/7 74AC11 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND F UNCTIO N Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A L X X H B X L X H C X X L H Y L L L H ABSOLUTE MAX...