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IDT54FCT16646CT Dataheets PDF



Part Number IDT54FCT16646CT
Manufacturers Integrated Device Technology
Logo Integrated Device Technology
Description FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS (3-STATE)
Datasheet IDT54FCT16646CT DatasheetIDT54FCT16646CT Datasheet (PDF)

Integrated Device Technology, Inc. FAST CMOS 16-BIT BUS IDT54/74FCT16646T/AT/CT/ET IDT54/74FCT162646T/AT/CT/ET TRANSCEIVER/ REGISTERS (3-STATE) 74FCT162646T/AT/CT/ET 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the in.

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Integrated Device Technology, Inc. FAST CMOS 16-BIT BUS IDT54/74FCT16646T/AT/CT/ET IDT54/74FCT162646T/AT/CT/ET TRANSCEIVER/ REGISTERS (3-STATE) 74FCT162646T/AT/CT/ET 16-bit registered transceivers are built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit bus transceivers with 3-state D-type registers. The control circuitry is organized for multiplexed transmission of data between A bus and B bus either directly or from the internal storage registers. Each 8-bit transceiver/register features direction control (xDIR), over-riding Output Enable control (xOE) and Select lines (xSAB and xSBA) to select either real-time data or stored data. Separate clock inputs are provided for A and B port registers. Data on the A or B data bus, or both, can be stored in the internal registers by the LOW-to-HIGH transitions at the appropriate clock pins. Flowthrough organization of signal pins simplifies layout. All inputs are designed with hysteresis for improved noise margin. The IDT54/74FCT16646T/AT/CT/ET are ideally suited for driving high-capacitance loads and low-impedance backplanes. The output buffers are designed with power off disable capability to allow "live insertion" of boards when used as backplane drivers. The IDT54/74FCT162646T/AT/CT/ET have balanced output drive with current limiting resistors. This offers low ground bounce, minimal undershoot, and controlled output fall times–reducing the need for external series terminating resistors. The IDT54/74FCT162646T/AT/CT/ET are plug-in replacements for the IDT54/74FCT16646T/AT/CT/ET and 54/74ABT16646 for on-board bus interface applications. FEATURES: • Common features: – 0.5 MICRON CMOS Technology – High-speed, low-power CMOS replacement for ABT functions – Typical tSK(o) (Output Skew) < 250ps – Low input and output leakage ≤1µ A (max.) – ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) – Packages include 25 mil pitch SSOP, 19.6 mil pitch TSSOP, 15.7 mil pitch TVSOP and 25 mil pitch Cerpack – Extended commercial range of -40°C to +85°C – VCC = 5V ±10% • Features for FCT16646T/AT/CT/ET: – High drive outputs (-32mA IOH, 64mA IOL) – Power off disable outputs permit “live insertion” – Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V, TA = 25°C • Features for FCT162646T/AT/CT/ET: – Balanced Output Drivers: ±24mA (commercial), ±16mA (military) – Reduced system switching noise – Typical VOLP (Output Ground Bounce) < 0.6V at VCC = 5V,TA = 25°C DESCRIPTION: The IDT54/74FCT16646T/AT/CT/ET and IDT54/ FUNCTIONAL BLOCK DIAGRAM 1OE 1DIR 1CLKBA 1SBA 1CLKAB 1SAB B REG 2OE 2DIR 2CLKBA 2SBA 2CLKAB 2SAB B REG D C 1A1 A REG 1B1 2A1 A REG D C 2B1 D C D C TO 7 OTHER CHANNELS TO 7 OTHER CHANNELS 2540 drw 01 2540 drw 02 The IDT logo is a registered trademark of Integrated Device Technology, Inc. MILITARY AND COMMERCIAL TEMPERATURE RANGES ©1996 Integrated Device Technology, Inc. AUGUST 1996 DSC-4231/9 5.13 1 IDT54/74FCT16646T/AT/CT/ET, 162646T/AT/CT/ET FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATIONS 1DIR 1CLKAB 1SAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 SO56-1 43 SO56-2 SO56-3 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE 1CLKBA 1SBA 1DIR 1CLKAB 1SAB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 E56-1 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 2540 drw 04 1OE 1CLKBA 1SBA GND 1A1 1A 2 GND 1B1 1B2 GND 1A1 1A2 GND 1B1 1B2 VCC 1A 3 1A 4 1A5 VCC 1B3 1B4 1B5 VCC 1A3 1A4 1A5 VCC 1B3 1B4 1B5 GND 1A 6 1A 7 1A 8 2A1 2A 2 2A 3 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 1A6 1A7 1A8 2A1 2A2 2A3 GND 1B6 1B7 1B8 2B1 2B2 2B3 GND 2A 4 2A5 2A6 GND 2B4 2B5 2B6 GND 2A4 2A5 2A6 GND 2B4 2B5 2B6 VCC 2A 7 2A8 VCC 2B7 2B8 VCC 2A7 2A8 VCC 2B7 2B8 GND 2SAB 2CLKAB 2DIR GND 2SBA 2CLKBA 2OE GND 2SAB 2CLKAB 2DIR 2540 drw 03 GND 2SBA 2CLKBA 2OE SSOP/ TSSOP/TVSOP TOP VIEW CERPACK TOP VIEW 5.13 2 IDT54/74FCT16646T/AT/CT/ET, 162646T/AT/CT/ET FAST CMOS 16-BIT BUS TRANSCEIVER/REGISTER MILITARY AND COMMERCIAL TEMPERATURE RANGES PIN DESCRIPTION Description Data Register A Inputs Data Register B Outputs xBx Data Register B Inputs Data Register A Outputs xCLKAB, xCLKBA Clock Pulse Inputs xSAB, xSBA xDIR, xOE Output Data Source Select Inputs Output Enable Inputs 2540 tbl 01 CAPACITANCE (TA = +25°C, f = 1.0MHz) Symbol Parameter(1) CIN Input Capacitance CI/O I/O Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. Unit 6.0 pF 8.0 pF 2540 tbl 02 Pin Names xAx NOTE: 1. This parameter is measured at characterization but not tested. FUNCTION TABLE(2) Inputs xOE H H L L L L xDIR X X L L H H xCLKAB xCLKBA H or L ↑ X X X H or L H or L ↑ X H or L X X xSAB X X X X L H xSBA X X L H X X xAx Input Output Input Data I/O(1) xBx Input Input Output Isolation Store A and B Data Real .


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