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74F109

Part Number	74F109
Manufacturer	Fairchild Semiconductor
Description	Dual JK Positive Edge-Triggered Flip-Flop
Published	Apr 3, 2005
Detailed Description	74F109 Dual JK Positive Edge-Triggered Flip-Flop April 1988 Revised November 1999 74F109 Dual JK Positive Edge-Trigger...
Datasheet	74F109 PDF File

Overview

74F109 Dual JK Positive Edge-Triggered Flip-Flop April 1988 Revised November 1999 74F109 Dual JK Positive Edge-Triggered Flip-Flop General Description The F109 consists of two high-speed, completely independent transition clocked JK flip-flops.
The clocking operation is independent of rise and fall times of the clock waveform.
The JK design allows operation as a D-type flip-flop (refer to F74 data sheet) by connecting the J and K inputs.
Asynchronous Inputs: LOW input to SD sets Q to HIGH level LOW input to CD sets Q to LOW level Clear and Set are independent of clock Simultaneous LOW on CD and SD makes both Q and Q HIGH Ordering Code: Order Number 74F109SC 74F109SJ 74F109PC Package Numbe...

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