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74AVC16374

NXP

16-bit edge triggered D-type flip-flop

INTEGRATED CIRCUITS DATA SHEET 74AVC16374 16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state Product Spec...


NXP

74AVC16374

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INTEGRATED CIRCUITS DATA SHEET 74AVC16374 16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state Product Specification Supersedes data of 1998 Dec 11 File under Integrated Circuits, IC24 2000 Mar 09 Philips Semiconductors Product Specification 16-bit edge triggered D-type flip-flop; 3.6 V tolerant; 3-state FEATURES Wide supply voltage range from 1.2 to 3.6 V Complies with JEDEC standard no. 8-1A/5/7 CMOS low power consumption Input/output tolerant up to 3.6 V DCO (Dynamic Controlled Output) circuit dynamically changes output impedance, resulting in noise reduction without speed degradation Low inductance multiple VCC and GND pins to minimize noise and ground bounce Supports Live Insertion. DESCRIPTION 74AVC16374 The 74AVC16374 is a 16-bit edge triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. The 74AVC16374 consist of 2 sections of eight edge triggered flip-flops. A clock input (CP) and an output enable (OE) are provided per 8-bit section. The 74AVC16374 is designed to have an extremely fast propagation delay and a minimum amount of power consumption. To ensure the high-impedance output state during power-up or power-down, nOE should be tied to VCC through a pull-up resistor (Live Insertion). A Dynamic Controlled Output (DCO) circuitry is implemented to support termination line drive during transient (see Figs 1 and 2). MNA506 handbook, halfpage 0 MNA507 handbook, halfpage ...




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