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74ALVT162821

NXP

20-bit bus-interface D-type flip-flop

INTEGRATED CIRCUITS 74ALVT162821 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30W termin...


NXP

74ALVT162821

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Description
INTEGRATED CIRCUITS 74ALVT162821 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30W termination resistors (3-State) Product specification Supersedes data of 1997 Feb 13 IC23 Data Handbook 1998 Oct 02 Philips Semiconductors Philips Semiconductors Product specification 2.5V/3.3V 20-bit bus-interface D-type flip-flop; positive-edge trigger with 30W termination resistors (3-State) 74ALVT162821 FEATURES Outputs include series resistance of 30W making external termination resistors unnecessary DESCRIPTION The 74ALVT162821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. It is designed for VCC operation at 2.5V or 3.3V with I/O compatibility to 5V. The 74ALVT162821 has two 10-bit, edge triggered registers, with each register coupled to a 3-State output buffer. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active Low Output Enable (nOE) controls all ten 3-State buffers independent of the register operation. When nOE is Low, the data in the register appears at the outputs. When nOE is High, the outputs are...




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