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74ALVCH16825

NXP

18-bit buffer/driver

INTEGRATED CIRCUITS 74ALVCH16825 18-bit buffer/driver (3-State) Product specification IC24 Data Handbook 1998 Jul 27 P...


NXP

74ALVCH16825

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INTEGRATED CIRCUITS 74ALVCH16825 18-bit buffer/driver (3-State) Product specification IC24 Data Handbook 1998 Jul 27 Philips Semiconductors Philips Semiconductors Product specification 18-bit buffer/driver (3-State) 74ALVCH16825 FEATURES Wide supply voltage range of 1.2V to 3.6V Complies with JEDEC standard no. 8-1A. CMOS low power consumption Direct interface with TTL levels Current drive ± 24 mA at 3.0 V MULTIBYTETM flow-through standard pin-out architecture Low inductance multiple VCC and GND pins for minimum noise and ground bounce PIN CONFIGURATION 1OE1 1Y1 1Y1 GND 1Y2 1Y3 VCC 1Y4 1Y5 1Y6 GND 1Y7 1Y8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 1OE2 1A0 1A1 GND 1A2 1A3 VCC 1A4 1A5 1A6 GND 1A7 1A8 GND GND 2A0 2A1 GND 2A2 2A3 2A4 VCC 2A5 2A6 GND 2A7 2A8 2OE2 All data inputs have bus hold Output drive capability 50Ω transmission lines @ 85°C DESCRIPTION The 74ALVCH16825 is an 18–bit non-inverting buffer/driver with 3-State outputs for bus-oriented applications. The 74ALVCH16825 consists of two 9-bit sections with separate output enable signals. For either 9-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be LOW for corresponding D outputs to be active. If either output enable input is HIGH, the outputs of that 9-buffer section are in the high impedance state. The 74ALVCH16825 has active bus ...




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