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M27C64A Dataheets PDF



Part Number M27C64A
Manufacturers STMicroelectronics
Logo STMicroelectronics
Description 64 Kbit 8Kb x 8 UV EPROM and OTP EPROM
Datasheet M27C64A DatasheetM27C64A Datasheet (PDF)

M27C64A 64 Kbit (8Kb x 8) UV EPROM and OTP EPROM 5V ± 10% SUPPLY VOLTAGE in READ OPERATION FAST ACCESS TIME: 150ns LOW POWER “CMOS” CONSUMPTION: – Active Current 30mA – Standby Current 100µA PROGRAMMING VOLTAGE: 12.5V ± 0.25V HIGH SPEED PROGRAMMING (less than 1 minute) ELECTRONIC SIGNATURE – Manufacturer Code: 9Bh – Device Code: 08h DESCRIPTION The M27C64A is a 64Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor .

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M27C64A 64 Kbit (8Kb x 8) UV EPROM and OTP EPROM 5V ± 10% SUPPLY VOLTAGE in READ OPERATION FAST ACCESS TIME: 150ns LOW POWER “CMOS” CONSUMPTION: – Active Current 30mA – Standby Current 100µA PROGRAMMING VOLTAGE: 12.5V ± 0.25V HIGH SPEED PROGRAMMING (less than 1 minute) ELECTRONIC SIGNATURE – Manufacturer Code: 9Bh – Device Code: 08h DESCRIPTION The M27C64A is a 64Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large programs and is organized as 8,192 by 8 bits. The FDIP28W (window ceramic frit-seal package) has transparent lid which allows the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only on time and erasure is not required, the M27C64A is offered in PLCC32 package. 28 1 PLCC32 (C) FDIP28W (F) Figure 1. Logic Diagram VCC VPP 13 A0-A12 8 Q0-Q7 Table 1. Signal Names A0-A12 Q0-Q7 E G P VPP VCC VSS March 1998 Address Inputs Data Outputs Chip Enable Output Enable P E G M27C64A VSS Program Program Supply Supply Voltage Ground 1/12 AI00834B M27C64A Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections AI00835 VSS DU Q3 Q4 Q5 AI00836 VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS 1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27C64A 21 8 20 9 19 10 18 11 17 12 16 13 15 14 VCC P NC A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3 A7 A12 VPP DU VCC P NC 1 32 A6 A5 A4 A3 A2 A1 A0 NC Q0 A8 A9 A11 NC G A10 E Q7 Q6 9 M27C64A 25 17 Warning: NC = Not Connected, DU = Don’t Use Warning: NC = Not Connected Table 2. Absolute Maximum Ratings (1) Symbol TA TBIAS TSTG VIO (2) Parameter Ambient Operating Temperature (3) Temperature Under Bias Storage Temperature Input or Output Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage Q1 Q2 Value –40 to 125 –50 to 125 –65 to 150 –2 to 7 –2 to 7 –2 to 13.5 –2 to 14 Unit °C °C °C V V V V VCC VA9 (2) VPP Notes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns. 3. Depends on range. DEVICE OPERATION The modes of operation of the M27C64A are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. Read Mode The M27C64A has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should 2/12 M27C64A be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C64A has a standby mode which reduces the active current from 30mA to 100µA. The M27C64A is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input. Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur. For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device. System Considerations The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, ICC, has three segments that are of interest to the system designer: the standby current level, the .


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