Document
FDG6318P
January 2003
FDG6318P
Dual P-Channel, Digital FET
General Description
These dual P-Channel logic level enhancement mode MOSFET are produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize on-state resistance. This device has been designed especially for low voltage applications as a replacement for bipolar digital transistors and small signal MOSFETS.
Features
• –0.5 A, –20 V. RDS(ON) = 780 mΩ @ VGS = –4.5 V RDS(ON) = 1200 mΩ @ VGS = –2.5 V
• Very low level gate drive requirements allowing direct operation in 3V circuits (VGS(th) < 1.5V). • Compact industry standard SC70-6 surface mount package
Applications
• Battery management
S G D D G
Pin 1
S 1 or 4
6 or 3 D 5 or 2 G 4 or 1 S
G 2 or 5
S
D 3 or 6
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
Symbol
VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed
TA=25oC unless otherwise noted
Parameter
Ratings
–20 ±12
(Note 1)
Units
V V A W °C
–0.5 –1.8 0.3 –55 to +150
Power Dissipation for Single Operation
(Note 1)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1)
415
°C/W
Package Marking and Ordering Information
Device Marking .38 Device FDG6318P Reel Size 7’’ Tape width 8mm Quantity 3000 units
2003 Fairchild Semiconductor Corporation
FDG6318P Rev C (W)
FDG6318P
Electrical Characteristics
Symbol
BVDSS ∆BVDSS ∆TJ IDSS IGSS
TA = 25°C unless otherwise noted
Parameter
Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage
(Note 2)
Test Conditions
VGS = 0 V, ID = –250 µA
Min
–20
Typ
Max
Units
V
Off Characteristics
ID = –250 µA, Referenced to 25°C VDS = –16 V, VGS = 0 V VGS = ±12 V, VDS = 0 V ID = –250 µA –10 –1 ±100 mV/°C µA nA
On Characteristics
VGS(th) ∆VGS(th) ∆TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance
VDS = VGS,
–0.65
–1.2 2 580 980 780
–1.5
V mV/°C
ID = –250 µA, Referenced to 25°C VGS = –4.5 V, VGS = –2.5 V, VGS = –4.5 V, VGS = –4.5 V, VDS = –5 V, ID = –0.5 A ID = –0.4 A ID = –0.5 A, TJ=125°C VDS = –5 V ID = –0.5 A
780 1200
mΩ
ID(on) gFS
–1.8 1.1
A S
Dynamic Characteristics
Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance
(Note 2)
VDS = –10 V, V GS = 0 V, f = 1.0 MHz VGS = 15 mV, f = 1.0 MHz
83 20 11 12.1
pF pF pF Ω
Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd IS VSD trr Qrr Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge
VDD = –10 V, ID = 1 A, VGS = –4.5 V, RGEN = 6 Ω
6 12 6 1
12 22 13 3 1.2
ns ns ns ns nC nC nC
VDS = –10 V, ID = –0.6 A, VGS = –4.5 V
0.86 0.22 0.25
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = –0.25 A(Note 2) –0.83 12.6 2.52 –0.25 –1.2 A V ns nC
IF = –0.5 A, diF/dt = 100 A/µs
Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθJA is determined by the user's board design. RθJA = 415°C/W when mounted on a minimum pad . 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDG6318P Rev C (W)
FDG6318P
Typical Characteristics
1.8 -4.5V -ID, DRAIN CURRENT (A) -6.0V 1.2 -2.5V -3.0V
RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE
VGS = -10.0V
-3.5V
1.75
1.5
VGS = -3.5V -4.0V -4.5V
1.25
-5.0V -6.0V
0.6 -2.0V
1
-10.0V
0 0 0.5 1 1.5 2 2.5 3 -VDS, DRAIN-SOURCE VOLTAGE (V)
0.75 0 0.4 0.8 -ID, DRAIN CURRENT (A) 1.2 1.6
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.8 RDS(ON), ON-RESISTANCE (OHM)
1.4 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.3 1.2 1.1 1 0.9 0.8 0.7 -50 -25 0 25 50 75
o
ID = -0.5A VGS = -4.5V
ID = -0.25A 1.4
1
TA = 125oC
0.6
TA = 25oC
100
125
0.2 0 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V)
TJ, JUNCTION TEMPERATURE ( C)
Figure 3. On-Resistance Variation with Temperature.
1.8 VDS = -5V -ID, DRAIN CURRENT (A) TA = -55oC 1.2 125oC 0.6 25oC -IS, REVERSE DRAIN CURRENT (A)
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
10 VGS = 0V 1 TA = 125oC
0.1
0.01
25oC -55 C
o
0.001
0 0.5 1 1.5 2 2.5 3 3.5 -VGS, GATE TO SOURCE VOLTAGE (V)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4 -VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDG6318P Rev C (W)
FDG6318P
Typical Characteristics
10 -.