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DAC8143 Dataheets PDF



Part Number DAC8143
Manufacturers Analog Devices
Logo Analog Devices
Description 12-Bit Serial Daisy-Chain CMOS D/A Converter
Datasheet DAC8143 DatasheetDAC8143 Datasheet (PDF)

a FEATURES Fast, Flexible, Microprocessor Interfacing in Serially Controlled Systems Buffered Digital Output Pin for Daisy-Chaining Multiple DACs Minimizes Address-Decoding in Multiple DAC Systems—Three-Wire Interface for Any Number of DACs One Data Line One CLK Line One Load Line Improved Resistance to ESD –40؇ C to +85؇ C for the Extended Industrial Temperature Range APPLICATIONS Multiple-Channel Data Acquisition Systems Process Control and Industrial Automation Test Equipment Remote Microproc.

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a FEATURES Fast, Flexible, Microprocessor Interfacing in Serially Controlled Systems Buffered Digital Output Pin for Daisy-Chaining Multiple DACs Minimizes Address-Decoding in Multiple DAC Systems—Three-Wire Interface for Any Number of DACs One Data Line One CLK Line One Load Line Improved Resistance to ESD –40؇ C to +85؇ C for the Extended Industrial Temperature Range APPLICATIONS Multiple-Channel Data Acquisition Systems Process Control and Industrial Automation Test Equipment Remote Microprocessor-Controlled Systems GENERAL INFORMATION 12-Bit Serial Daisy-Chain CMOS D/A Converter DAC8143 FUNCTIONAL BLOCK DIAGRAM VDD RFB DAC8143 VREF 12-BIT D/A CONVERTER IOUT1 IOUT2 CLR LD1 LD2 STB1 STB4 STB3 STB2 SRI IN CLK INPUT 12-BIT SHIFT REGISTER OUT SRO AGND DAC REGISTER LOAD DGND The DAC8143 is a 12-bit serial-input daisy-chain CMOS D/A converter that features serial data input and buffered serial data output. It was designed for multiple serial DAC systems, where serially daisy-chaining one DAC after another is greatly simplified. The DAC8143 also minimizes address decoding lines enabling simpler logic interfacing. It allows three-wire interface for any number of DACs: one data line, one CLK line and one load line. Serial data in the input register (MSB first) is sequentially clocked out to the SRO pin as the new data word (MSB first) is simultaneously clocked in from the SRI pin. The strobe inputs are used to clock in/out data on the rising or falling (user selected) strobe edges (STB1, STB2, STB3, STB4). When the shift register’s data has been updated, the new data word is transferred to the DAC register with use of LD1 and LD2 inputs. Separate LOAD control inputs allow simultaneous output updating of multiple DACs. An asynchronous CLEAR input resets the DAC register without altering data in the input register. Improved linearity and gain error performance permits reduced circuit parts count through the elimination of trimming components. Fast interface timing reduces timing design considerations while minimizing microprocessor wait states. The DAC8143 is available in plastic packages that are compatible with autoinsertion equipment. Plastic packaged devices come in the extended industrial temperature range of –40°C to +85°C. REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 © Analog Devices, Inc., 1999 WR ADDRESS BUS ADDRESS DECODER DBX SRI STROBE SRO LOAD ␮P SRI DAC8143 STROBE SRO LOAD DAC8143 SRI STROBE SRO LOAD DAC8143 SRI STROBE SRO LOAD DAC8143 Figure 1. Multiple DAC8143s wi.


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