Document
CMOS Latched 4-/8-Channel Analog Multiplexers
ADG528A/ADG529A
FEATURES 44 V Supply Maximum Rating VSS to VDD Analog Signal Range Single-/Dual-Supply Specifications Wide Supply Ranges (10.8 V to 16.5 V) Microprocessor Compatible (100 ns WR Pulse) Extended Plastic Temperature Range
(–40°C to +85°C) Low Leakage (20 pA typ) Low Power Dissipation (28 mW max) Available in 18-Lead DIP/SOIC and 20-Lead PLCC Packages Superior Alternative to:
DG528 DG529
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION The ADG528A and ADG529A are CMOS monolithic analog multiplexers with eight channels and four dual channels, respectively. On-chip latches facilitate microprocessor interfacing. The ADG528A switches one of eight inputs to a common output, depending on the state of three binary addresses and an enable input. The ADG529A switches one of four differential inputs to a common differential output, depending on the state of two binary addresses and an enable input. Both devices have TTL and 5 V CMOS logic-compatible digital inputs.
The ADG528A and ADG529A are designed on an enhanced LC2MOS process, which gives an increased signal capability of VSS to VDD and enables operation over a wide range of supply voltages. The devices can comfortably operate anywhere in the 10.8 V to 16.5 V single- or dual-supply range. These multiplexers also feature high switching and low RON.
PRODUCT HIGHLIGHTS 1. Single-/dual-supply specifications with a wide tolerance.
The devices are specified in the 10.8 V to 16.5 V range for both single- and dual-supplies.
2. Easily Interfaced The ADG528A and ADG529A can be easily interfaced with microprocessors. The WR signal latches the state of the address control lines and the enable line. The RS signal clears both the address and enable data in the latches resulting in no output (all switches off). RS can be tied to the microprocessor reset pin.
3. Extended Signal Range The enhanced LC2MOS processing results in a high breakdown and an increased analog signal range of VSS to VDD.
4. Break-Before-Make Switching Switches are guaranteed break-before-make so that input signals are protected against momentary shorting.
5. Low Leakage Leakage currents in the range of 20 pA make these multiplexers suitable for high precision circuits.
REV. B
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ADG528A/ADG529A–SPECIFICATIONS
DUAL SUPPLY (VDD = +10.8 V to +16.5 V, VSS = –10.8 V to –16.5 V, unless otherwise noted.)
Parameter
ADG528A
ADG529A
K Version –40°C to
+25°C +85°C
ADG528A
ADG529A
B Version –40°C to
+25°C +85°C
ADG528A
ADG529A
T Version –55°C to
+25°C +125°C
Units
Comments
ANALOG SWITCH Analog Signal Range
RON
RON Drift RON Match IS (OFF), Off Input
Leakage
ID (OFF), Off Input Leakage ADG528A ADG529A
ID (ON), On Channel Leakage ADG528A ADG529A
IDIFF, Differential Off Output Leakage (ADG529A only)
VSS VDD 280
VSS VDD
450 600 300 400
0.6 5
0.02 1 50
0.04 1 100 1 50
0.04 1 100 1 50
25
VSS VDD 280
VSS VDD
450 600 300 400
0.6 5
0.02 1 50
0.04 1 100 1 50
0.04 1 100 1 50
25
VSS VDD 280
VSS VDD
450 600
300 400 0.6 5
0.02 1 50
0.04 1 100 1 50
0.04 1 100 1 50
25
V min
V max
Ω typ
–10 V ≤ VS ≤ +10 V, IDS = 1 mA; Test Circuit 1
Ω max
Ω max VDD = 15 V (± 10%), VSS = –15 V (±10%) Ω max VDD = 15 V (± 5%), VSS = –15 V (± 5%) %/°C typ –10 V ≤ VS ≤ +10 V, IDS = 1 mA % typ –10 V ≤ VS ≤ +10 V, IDS = 1 mA
nA typ V1 = ± 10 V, V2 = ϯ10 V; Test Circuit 2 nA max
nA typ V1 = ± 10 V, V2 = ϯ10 V; Test Circuit 3 nA max nA max
nA typ V1 = ± 10 V, V2 = ϯ10 V; Test Circuit 4 nA max nA max
nA max V1 = ± 10 V, V2 = ϯ10 V; Test Circuit 5
DIGITAL CONTROL
VINH, Input High Voltage VINL, Input Low Voltage IINL or IINH CIN Digital Input
Capacitance
8
2.4 0.8 1
DYNAMIC CHARACTERISTICS1
tTRANSITION
200 300 400
tOPEN tON (EN, WR) tOFF (EN, RS)
50 25 10 200 300 400 200 300 400
tW Write Pulse Width tS Address,
Enable Setup Time
100 120 100
tH, Address, Enable Hold Time
10
tRS Reset Pulse Width OFF Isolation
68
100
50
CS (OFF) CD (OFF)
ADG528A
5 22
ADG529A
11
QINJ, Charge Injection 4
2.4 0.8 1
8
200 300 400 50 25 10 200 300 400 200 300 400 100 120
100
10 100 68 50 5
22 11 4
2.4 0.8 1
8
200 300 400 50 25 10 200 300 400 200 300 400 100 130
100
10 100 68 50 5
22 11 4
V min V max µA max VIN = 0 to VDD
pF max
ns typ ns max ns typ ns min ns typ ns max ns typ ns max ns min
V1 = ± 10 V, V2 = ϯ10 V; Test Circuit 6 Test Circuit 7 Test Circuits 8 and 9 Tes.