Document
A61L73081 Series
128K X 8 BIT HIGH SPEED CMOS SRAM
Document Title 128K X 8 BIT HIGH SPEED CMOS SRAM
Revision History
Rev. No. 0.0 1.0
History Initial issue Change ICC1 from 120mA to 220mA
100mA to 210mA Change ISB1 from 8mA to 12mA Change ICDR from 1mA to 5mA Final spec. release
Issue Date July 14, 2000 April 26, 2001
Remark Preliminary Final
(April, 2001, Version 1.0)
AMIC Technology, Inc.
A61L73081 Series
128K X 8 BIT HIGH SPEED CMOS SRAM
Features
n Center power pinout n Supply voltage: 3.3V±10% n Access times: 12/15 ns (max.) n Current: Operating: -12: 220mA (max.)
-15: 210mA (max.) Standby: TTL: 25mA (max.)
CMOS: 12mA (max.)
General Description
The A61L73081 is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a 3.3V power supply. It is built using high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
Pin Configuration.