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AD1843 Dataheets PDF



Part Number AD1843
Manufacturers Analog Devices
Logo Analog Devices
Description Serial-Port 16-Bit SoundComm Codec
Datasheet AD1843 DatasheetAD1843 Datasheet (PDF)

a Serial-Port 16-Bit SoundComm Codec AD1843 FEATURES GENERAL PRODUCT DESCRIPTION Single Chip Integrated Speech, Audio, Fax and Modem The AD1843 SoundComm™ Codec is a complete analog front Codec end for high performance DSP-based telephony and audio apHighly Configurable Stereo ∑∆ ADCs and Quad ∑∆ DACs plications. The device integrates the real-world analog I/O reSupports V.34, V.32bis, and Fallback Modem Standards quirements for many popular functions thereby reducing size, As Well As Voice Ov.

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a Serial-Port 16-Bit SoundComm Codec AD1843 FEATURES GENERAL PRODUCT DESCRIPTION Single Chip Integrated Speech, Audio, Fax and Modem The AD1843 SoundComm™ Codec is a complete analog front Codec end for high performance DSP-based telephony and audio apHighly Configurable Stereo ∑∆ ADCs and Quad ∑∆ DACs plications. The device integrates the real-world analog I/O reSupports V.34, V.32bis, and Fallback Modem Standards quirements for many popular functions thereby reducing size, As Well As Voice Over Data power consumption, and system complexity. The AD1843 Dual Digital Resamplers with Programmable Input and SoundComm is the world’s first codec which can support four Output Phase and Frequency different sample rates simultaneously, without any beat freThree On-Chip Phase Lock Loops for Synchronization to quency noise issues. This is essential for highly integrated audio/ External Signals, Including Video modem/fax products since the sample rates associated with auThirteen Analog Inputs and Seven Analog Outputs dio are very much distinct from the sample rates associated with Advanced Analog and Digital Signal Mixing and Digitaltelephony-oriented data communication. It is also the first codec to-Digital Sample Rate Conversion to offer on-chip digital phase lock loops for sample rate synchroProgrammable Gain, Attenuation and Mute nization to external clock signals. This sample rate flexibility is On-Chip Signal Filters enabled through Analog Devices’ Continuous Time Oversampling Digital Interpolation and Decimation (CTO) technology. Analog Output Low Pass The main elements of the AD1843 are its extensive input and mix1 Hz Resolution Programmable Sample Rates from 4 kHz ing section, its two channels of sigma-delta (∑∆) analog-to-digital to 54 kHz Derived from a Single Clock Input conversion, its four channels of ∑∆ digital-to-analog conversion, its 80-Lead PQFP and 100-Lead TQFP Packages digital filters, and the clock and control circuitry for implementing Operation from +5 V or Mixed +5 V/+3 V Supplies the device’s different modes. The AD1843 permits flexible sampleFIFO-Buffered Serial Digital Interface Compatible with rate selection through programming and external synchronization, ADSP-21xx Fixed-Point DSPs many input and output options, and many mixing options. Advanced Power Management (continued on page 11) VHDL Model of Serial Port Available; Evaluation Board SoundComm is a trademark of Analog Devices, Inc. and MAFE Board Available SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SYNC 3 LIN MIC AUX1 AUX2 AUX3 MIN 4 20 dB 2 2 2 2 1 XTAL CONV 2 3 BIT 3 AD1843 S E L E C T O R PGA ∑∆ ADC S E L E C T O R ∑∆ DAC S E L E C T O R CLOCK GENERATION CONTROL REGISTERS CLKOUT µ/A LAW ADC D I G I T A L SCLK SDFS SDI SDO BM CS TSO TSI 2 XCTL [1:0] PDMNFT RESET PWRDWN MUTE MOUT MUTE LOUT1 2 ∑ DRIVER MUTE MUTE HPOUTL HPOUTC HPOUTR LOUT2 SUM GAM = GAIN ATTENUATION MUTE LEFT AND RIGHT CHANNELS VOLTAGE REFERENCE GAM GAM GAM GAM GAM GAM ATTN MUTE ∑ ∑ ∑ ∑ GAM ∑ MUTE LEFT AND RIGHT CHANNELS GAM M U T E ATTN ∑ FIFO µ/A LAW DAC1 I N T E R F A C E ATTN MUTE ∑∆ DAC ∑ M U T E MUTE ∑ µ/A LAW 4 2 ATTN FIFO DAC2 4 3 VCC 8 GNDD 9 VDD REV. 0 VREF CMOUT AAFILTL AAFILTR FILTL FILTR GNDA Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. © Analog Devices, Inc., 1996 One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703 AD1843–SPECIFICATIONS STANDARD TEST CONDITIONS UNLESS OTHERWISE NOTED Temperature Digital Supply (VDD) Analog Supply (VCC) Sample Rate (FS) Input Signal Analog Output Passband ADC FFT Size DAC FFT Size VIH VIL VOH VOL IOH IOL ANALOG INPUT 25 5.0 5.0 48 1008 20 Hz to 20 kHz 2048 8192 2.0 0.8 2.4 0.4 –2 2 °C V V kHz Hz V V V V mA mA DAC Conditions Autocalibrated 0 dB Attenuation 0 dB Relative to Full Scale 16-Bit Linear Mode No Output Load Mute Off DAC1 Single-Ended DAC2 Differential ADC Input Conditions Mic 20 dB Gain Disabled LIN Single-Ended (LINLSD & LINRSD = 0) Autocalibrated 0 dB PGA Gain –1.0 dB Relative to Full Scale Line Input 16-Bit Linear Mode Min Full-Scale Input Voltage (RMS Values Assume Sine Wave Input) All Inputs with ADRFLT & ADLFLT = 0 and LINLSD & LINRSD = 0 (LINLP, LINRP, AUX1L, AUX1R, AUX2L, AUX2R, AUX3L, AUX3R, MIN) All Inputs with ADRFLT & ADLFLT = 0 and LINLSD & LINRSD = 1 (LINLP & LINLN, LINRP & LINRN) All Inputs with ADRFLT & ADLFLT = 1 and LINLSD & LINRSD = 0 (LINLP, LINRP, AUX1L, AUX1R, AUX2L, AUX2R, AUX3L, AUX3R, MIN) All Inputs with ADRFLT & ADLFLT = 1 and LINLSD & LINRSD = 1 (LINLP & LINLN, LINRP & LINRN) MIC with +20 dB Gain (LMGE & RMGE = 1 and ADRFLT & ADLFLT = 0) (MICL, MICR) MIC with 0 dB Gain (LMGE & RMGE = 0 and .


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