GSM 3 V Receiver IF Subsystem
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FEATURES Fully Compliant with Standard and Enhanced GSM Specification –11 dBm Input 1 dB Compression Point 0 dBm Input...
Description
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FEATURES Fully Compliant with Standard and Enhanced GSM Specification –11 dBm Input 1 dB Compression Point 0 dBm Input Third Order Intercept 10 dB SSB Noise Figure (50 ⍀) DC-500 MHz RF and LO Bandwidths Linear IF Amplifier Linear-in-dB and Stable over Temperature Voltage Gain Control Quadrature Demodulator On-Board Phase-Locked Quadrature Oscillator Demodulates IFs from 5 MHz to 50 MHz Low Power 8 mA at Midgain 2 A Sleep Mode Operation 2.7 V to 5.5 V Operation Interfaces to AD7013, AD7015 and AD6421 Baseband Converters 20-Lead SSOP
GSM 3 V Receiver IF Subsystem AD6459
FUNCTIONAL BLOCK DIAGRAM
LO I RF BPF PLL Q GAIN CONTROL FREF
AD6459
GENERAL DESCRIPTION
The AD6459 is a 3 V, low power receiver IF subsystem for operation at input frequencies as high as 500 MHz and IFs from 5 MHz up to 50 MHz. It is optimized for operation in GSM, DCS1800 and PCS1900 receivers. It consists of a mixer, an IF amplifier, I and Q demodulators, a phase-locked quadrature oscillator, a precise AGC subsystem, and a biasing system with external power-down. The AD6459’s low noise, high intercept mixer is a doublybalanced Gilbert-Cell type. It has a nominal –11 dBm inputreferred 1 dB compression point and a 0 dBm input-referred third-order intercept. The mixer section of the AD6459 also includes a local oscillator (LO) preamplifier, which lowers the required LO drive to –16 dBm. The gain control input accepts an external gain-control voltage input from an external AGC detector or a DAC. It provides...
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