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AD7731 Dataheets PDF



Part Number AD7731
Manufacturers Analog Devices
Logo Analog Devices
Description Low Noise High Throughput 24-Bit Sigma-Delta ADC
Datasheet AD7731 DatasheetAD7731 Datasheet (PDF)

a FEATURES 24-Bit Sigma-Delta ADC 16 Bits p-p Resolution at 800 Hz Output Rate Programmable Output Rates up to 6.4 kHz Programmable Gain Front End ؎0.0015% Nonlinearity Buffered Differential Inputs Programmable Filter Cutoffs FASTStep™* Mode for Channel Sequencing Single Supply Operation APPLICATIONS Process Control PLCs/DCS Industrial Instrumentation Low Noise, High Throughput 24-Bit Sigma-Delta ADC AD7731 GENERAL DESCRIPTION The AD7731 is a complete analog front-end for process control appli.

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a FEATURES 24-Bit Sigma-Delta ADC 16 Bits p-p Resolution at 800 Hz Output Rate Programmable Output Rates up to 6.4 kHz Programmable Gain Front End ؎0.0015% Nonlinearity Buffered Differential Inputs Programmable Filter Cutoffs FASTStep™* Mode for Channel Sequencing Single Supply Operation APPLICATIONS Process Control PLCs/DCS Industrial Instrumentation Low Noise, High Throughput 24-Bit Sigma-Delta ADC AD7731 GENERAL DESCRIPTION The AD7731 is a complete analog front-end for process control applications. The device has a proprietary programmable gain front end that allows it to accept a range of input signal ranges, including low level signals, directly from a transducer. The sigmadelta architecture of the part consists of an analog modulator and a low pass programmable digital filter, allowing adjustment of filter cutoff, output rate and settling time. The part features three buffered differential programmable gain analog inputs (which can be configured as five pseudo-differential inputs), as well as a differential reference input. The part operates from a single +5 V supply and accepts seven unipolar analog input ranges: 0 to +20 mV, +40 mV, +80 mV, +160 mV, +320 mV, +640 mV and +1.28 V, and seven bipolar ranges: ± 20 mV, ± 40 mV, ± 80 mV, ± 160 mV, ± 320 mV, ± 640 mV and ± 1.28 V. The peak-to-peak resolution achievable directly from the part is 16 bits at an 800 Hz output rate. The part can switch between channels with 1 ms settling time and maintain a performance level of 13 bits of peak-to-peak resolution. The serial interface on the part can be configured for three-wire operation and is compatible with microcontrollers and digital signal processors. The AD7731 contains self-calibration and system calibration options and features an offset drift of less than 5 nV/°C and a gain drift of less than 2 ppm/°C. The part is available in a 24-lead plastic DIP, a 24-lead SOIC and 24-lead TSSOP package. FUNCTIONAL BLOCK DIAGRAM AVDD NC AIN1 AIN2 AIN3 AIN4 AIN5 AIN6 100nA AGND SERIAL INTERFACE AND CONTROL LOGIC CLOCK GENERATION REGISTER BANK CALIBRATION MICROCONTROLLER MCLK IN MCLK OUT MUX AVDD 100nA BUFFER PGA DVDD REF IN(–) REF IN(+) AD7731 SIGMA-DELTA A/D CONVERTER SIGMADELTA MODULATOR PROGRAMMABLE DIGITAL FILTER STANDBY SYNC SCLK CS DIN DOUT AGND DGND POL RDY RESET *FASTStep is a trademark of Analog Devices, Inc. REV. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 World Wide Web Site: http://www.analog.com Fax: 617/326-8703 © Analog Devices, Inc., 1997 AD7731–SPECIFICATIONS DGND = 0 V; f Parameter STATIC PERFORMANCE (CHP = 0) No Missing Codes2 Output Noise and Update Rates2 Integral Nonlinearity Offset Error2 Offset Drift vs. Temperature2 Offset Drift vs. Time5 Positive Full-Scale Error2, 6 Positive Full-Scale Drift vs. Temp2, 7, 8 Positive Full-Scale Drift vs. Time5 Gain Error2, 9 Gain Drift vs. Temperature2, 7, 10 Gain Drift vs. Time5 Bipolar Negative Full-Scale Error2 Negative Full-Scale Drift vs. Temp2, 7 Power Supply Rejection11 Power Supply Rejection11 Common-Mode Rejection (CMR)11 On AIN On AIN On REF IN Analog Input DC Bias Current2 Analog Input DC Bias Current Drift2 Analog Input DC Offset Current2 Analog Input DC Offset Current Drift2 STATIC PERFORMANCE (CHP = 1)2 No Missing Codes Output Noise and Update Rates Integral Nonlinearity Offset Error Offset Drift vs. Temperature Offset Drift vs. Time5 Positive Full-Scale Error6 Positive Full-Scale Drift vs. Temp7, 8 Positive Full-Scale Drift vs. Time5 Gain Error9 Gain Drift vs. Temperature7, 10 Gain Drift vs. Time5 Bipolar Negative Full-Scale Error Negative Full-Scale Drift vs. Temp Power Supply Rejection11 Power Supply Rejection11 Common-Mode Rejection (CMR)11 On AIN On AIN On REF IN Analog Input DC Bias Current Analog Input DC Bias Current Drift Analog Input DC Offset Current Analog Input DC Offset Current Drift ANALOG INPUTS/REFERENCE INPUTS Normal Mode 50 Hz/60 Hz Rejection2 Common-Mode 50 Hz/60 Hz Rejection2 Analog Inputs Differential Input Voltage Ranges12 B Version1 24 See Tables I and II 15 See Note 4 0.5 1/2/5 2.5 See Note 4 0.6 1.5/3/6 3 See Note 4 2 10 See Note 4 1 90 60 95 85 120 60 150 30 100 24 See Tables III and IV 15 See Note 4 5 25 See Note 4 2 10 See Note 4 2 10 See Note 4 2 110 85 110 85 120 50 100 10 50 88 120 (AVDD = +5 V, DVDD = +3 V or +5 V; REF IN(+) = +2.5 V; REF IN(–) = AGND; AGND = CLK IN = 4.9152 MHz. All specifications TMIN to TMAX unless otherwise noted.) Units Bits min ppm of FSR max µV/°C typ µV/°C typ µV/1000 Hr µV/°C typ µV/°C typ µV/1000 Hr ppm/°C typ ppm/1000 Hr µV/°C typ dB typ dB typ dB typ dB typ dB typ nA max pA/°C typ .


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