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M15T1G1664A

ESMT
Part Number M15T1G1664A
Manufacturer ESMT
Description DDR3 SDRAM
Published Sep 20, 2018
Detailed Description ESMT DDR3(L) SDRAM Feature Interface and Power Supply SSTL_135: VDD/VDDQ = 1.35V(-0.067V/+0.1V) SSTL_15: VDD/VDDQ = 1.5V...
Datasheet PDF File M15T1G1664A PDF File

M15T1G1664A
M15T1G1664A

Overview
ESMT DDR3(L) SDRAM Feature Interface and Power Supply SSTL_135: VDD/VDDQ = 1.
35V(-0.
067V/+0.
1V) SSTL_15: VDD/VDDQ = 1.
5V(±0.
075V) JEDEC DDR3(L) Compliant 8n Prefetch Architecture Differential Clock (CK/ CK ) and Data Strobe (DQS/ DQS ) Double-data rate on DQs, DQS and DM Data Integrity Auto Refresh and Self Refresh Modes Power Saving Mode Partial Array Self Refresh(PASR) Power Down Mode Signal Integrity Configurable DS for system compatibility Configurable On-Die Termination ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ± 1%) M15T1G1664A (2C) 8M x 16 Bit x 8 Banks DDR3(L) SDRAM Signal Synchronization Write Leveling via MR settings Read Leveling via MPR Programmab...


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