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Obsolete
MM54C200 MM74C200 256-Bit TRI-STATE Random Access Read Write Memory
February 1988
MM54C200 MM74C200 256-Bit TRI-STATE Random Access Read Write Memory
General Description
The MM54C200 MM74C200 is a 256-bit random access read write memory Inputs consist of eight address lines and three chip enables The eight binary address inputs are decoded internally to select each of the 256 locations The internal address register latches and address information are on the positive to negative edge of CE3 The TRISTATE data output line working in conjunction with CE1 or CE2 inputs provides for easy memory expansion
Address Operation Address inputs must be stable tSA prior to the positive to negative transition of CE3 It is therefore unnecessary to hold address information stable for more than tHA after the memory is enabled (positive to negative transition)
Note The timing is different from the DM74200 in that a positive to negative transition of the CE3 must occur for the memory to be sel.