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ODTHXX24

CMOS Gate Array

Description

2'7+;; ® $0,+* PLFURQ &026 *DWH $UUD\ Description ODTHXX24 is a high performance,24 mA, non-inverting, TTL-level output buffer piece. Logic Symbol Truth Table Pin Loading ODTHXX24 A PADM A PADM LL HH Load A 14.5 eql HDL Syntax Verilog .................... ODTHXX24 inst_name (PADM, A); VHDL...................... inst_name: ODTHXX24 port map (P...

AMI

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ODTHXX24 CMOS Gate Array - AMI

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