Document
Core Logic
21;
®
$0,+* PLFURQ &026 *DWH $UUD\
Description ON2x is a familyof OR-NAND circuits consisting of one 2-input OR gate into a 2-input NAND gate.
Logic Symbol
Truth Table
A ON2x A B C Q L LXH
B
Q XXLH
All other combinations L
C
HDL Syntax Verilog .................... ON2x inst_name (Q, A, B, C); VHDL...................... inst_name: ON2x port map (Q, A, B, C);
Pin Loading
Pin Name
A B C
ON21 1.0 1.1 1.0
Equivalent Loads
ON22
ON24
1.0 1.0
1.0 1.0
1.0 1.0
ON26 2.1 2.1 1.0
Size And Power Characteristics
Cell
ON21 ON22
Equivalent Gates
2.0 3.0
Power Characteristicsa
Static IDD (TJ = 85°C) (nA)
EQLpd (Eq-load)
TBD
2.0
TBD
6.4
ON24 ON26
4.0 7.0
TBD TBD
7.3 15.2
a. See page 2-15 for power equation.
3-183
21;
$0,+* PLFURQ &026 *DWH $UUD\
Propagation Delays (ns)
Conditions: TJ = 25°C, VDD = 5.0V, Typical Process
ON21
Number of Equivalent Loads
From: Any Input To: Q
tPLH tPHL
Number of Equivalent Loads
1
0.12 0.20
1
2
0.19 0.25
4
.