MCM72CF64

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM72CF32/D Advance Information 256KB and 512KB BurstRAM™ Secondary Cache Module for Pentium™ The MCM72CF32SG and MCM72CF64SG are designed to provide a burstable, high performance, 256K/512K L2 cache for the Pentium microprocessor. The modules are configured as 32K x 72 and 64K x 72 bits in a 160 pin card edge memory module. The module uses four of Motorola’s MCM67C518 or MCM67C618 BiCMOS BurstRAMs. Bursts can be initiated with either address status processor (ADSP) or address status controller (ADSC). Subsequent burst addresses are generated internal to the BurstRAM by the burst advance (ADV) input pin. Write cycles are internally self timed and are initiated by the rising edge of the clock (K) input. Eight write enables are provided for byte write control. The cache family is designed to interface with popular Pentium cache controllers with on board tag. PD0 – PD2 are reserved for density identification. Penti...