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BS616LV4020 Dataheets PDF



Part Number BS616LV4020
Manufacturers Brilliance Semiconductor
Logo Brilliance Semiconductor
Description Very Low Power/Voltage CMOS SRAM 256K x 16 or 512K x 8 bit switchable
Datasheet BS616LV4020 DatasheetBS616LV4020 Datasheet (PDF)

BSI „ FEATURES Very Low Power/Voltage CMOS SRAM 256K x 16 or 512K x 8 bit switchable „ DESCRIPTION BS616LV4020 • Very low operation voltage : 2.7 ~ 3.6V • Very low power consumption : Vcc = 3.0V C-grade: 20mA (Max.) operating current I-grade : 25mA (Max.) operating current 0.5uA (Typ.) CMOS standby current • High speed access time : -70 70ns (Max.) at Vcc=3.0V -10 100ns (Max.) at Vcc=3.0V •Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static ope.

  BS616LV4020   BS616LV4020



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BSI „ FEATURES Very Low Power/Voltage CMOS SRAM 256K x 16 or 512K x 8 bit switchable „ DESCRIPTION BS616LV4020 • Very low operation voltage : 2.7 ~ 3.6V • Very low power consumption : Vcc = 3.0V C-grade: 20mA (Max.) operating current I-grade : 25mA (Max.) operating current 0.5uA (Typ.) CMOS standby current • High speed access time : -70 70ns (Max.) at Vcc=3.0V -10 100ns (Max.) at Vcc=3.0V •Automatic power down when chip is deselected • Three state outputs and TTL compatible • Fully static operation • Data retention supply voltage as low as 1.5V • Easy expansion with CE1, CE2 and OE options • I/O Configuration x8/x16 selectable by CIO, LB and UB pin The BS616LV4020 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 16 bits or 524,288 bytes by 8 bits selectable by CIO pin and operates from a wide range of 2.7V to 3.6V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 0.5uA and maximum access time of 70/100ns in 3V operation. Easy memory expansion is provided by active HIGH chip enable2(CE2), active LOW chip enable1(CE1), active LOW output enable(OE) and three-state output drivers. The BS616LV4020 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS616LV4020 is available in DICE form and 48-pin BGA type. „ PRODUCT FAMILY OPERATING TEMPERATURE SPEED (ns) Vcc=3.0V POWER DISSIPATION STANDBY Operating (ICCSB1, Max) (ICC, Max) PRODUCT FAMILY Vcc RANGE PKG TYPE Vcc=3.0V Vcc=3.0V BS616LV4020DC BS616LV4020AC BS616LV4020BC BS616LV4020DI BS616LV4020AI BS616LV4020BI +0 C to +70 C O O O O 2.7V ~ 3.6V 70 / 100 8uA 20mA -40 C to +85 C 2.7V ~ 3.6V 70 / 100 12uA 25mA DICE BGA-48-0608 BGA-48-0810 DICE BGA-48-0608 BGA-48-0810 „ PIN CONFIGURATION „ BLOCK DIAGRAM A15 A14 A13 A12 A11 A10 A9 A8 A17 A7 A6 Address Input Buffer 22 Row Decoder 2048 Memory Array 2048 x 2048 2048 D0 16(8) Data Input Buffer 16(8) Column I/O . . . . D15 CE1 CE2 WE OE UB LB CIO Vdd Vss . . . . Write Driver 16(8) Sense Amp 128(256) Column Decoder 16(8) Data Output Buffer 14(16) Control Address Input Buffer A16 A0 A1 A2 A3 A4 A5 (SAE) Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. R0201-BS616LV4020 1 Revision 2.3 April 2002 BSI „ PIN DESCRIPTIONS BS616LV4020 Name A0-A17 Address Input SAE Address Input CIO x8/x16 select input Function These 18 address inputs select one of the 262,144 x 16-bit words in the RAM. This address input incorporates with the above 18 address input select one of the 524,288 x 8-bit bytes in the RAM if the CIO is LOW. Don't use when CIO is HIGH. This input selects the organization of the SRAM. 262,144 x 16-bit words configuration is selected if CIO is HIGH. 524,288 x 8-bit bytes configuration is selected if CIO is LOW. CE1 Chip Enable 1 Input CE2 Chip Enable 2 Input CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when data read from or write to the device. If either chip enable is not active, the device is deselected and is in a standby power mode. The DQ pins will be in the high impedance state when the device is deselected. The write enable input is active LOW and controls read and write operations. With the chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ pins; when WE is LOW, the data present on the DQ pins will be written into the selected memory location. WE Write Enable Input OE Output Enable Input The output enable input is active LOW. If the output enable is active while the chip is selected and the write enable is inactive, data will be present on the DQ pins and they will be enabled. The DQ pins will be in the high impedance state when OE is inactive. LB and UB Data Byte Control Input DQ0 - DQ15 Data Input/Output Ports Vcc Gnd Lower byte and upper byte data input/output control pins. The chipis deselected when both LB and UB pins are HIGH. These 16 bi-directional ports are used to read data from or write data into the RAM. Power Supply Ground R0201-BS616LV4020 2 Revision 2.3 April 2002 BSI „ TRUTH TABLE MODE CE1 H Fully Standby X Output Disable L L H H H X CE2 X X X X X X L Read from SRAM L ( WORD mode ) H L H H H L L Write to SRAM L ( WORD mode ) H X L H H L Read from SRAM L ( BYTE Mode ) Write to SRAM L ( BYTE Mode ) H X L L X X A-1 H L H L X X A-1 L L X L L H X X X H X OE WE CIO LB X UB X X SAE BS616LV4020 D0~7 D8~15 VCC Current High-Z High-Z ICCSB, ICCSB1 High-Z Dout High-Z Dout Din X Din Dout High-Z High-Z Dout Dout X Din Din High-Z ICC ICC ICC ICC Din X ICC „ ABSOLUTE MAXIMUM RATINGS(1) SYMBOL V TERM TBIAS TSTG PT IOUT PARAMETER Terminal Voltage Respect to GND with „ OPERATING RANGE UNITS V O RATING -0.5 to Vcc+0.5 -40 to +125 -60 to +150 1.0 20 RANGE Commercial Industrial AMBIENT TEMPERATURE 0 O C to +70 O C -40 C to +85 C O O Vcc .


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