Document
Philips Semiconductors
Product Specification
PowerMOS transistor Logic level FET
GENERAL DESCRIPTION
N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in automotive and general purpose switching applications.
BUK581-100A
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V MAX. 100 0.9 1.5 150 0.90 UNIT V A W ˚C Ω
PINNING - SOT223
PIN 1 2 3 4 gate drain source drain (tab) DESCRIPTION
PIN CONFIGURATION
4
SYMBOL
d
g
1
2
3
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction Temperature CONDITIONS RGS = 20 kΩ Tamb = 25 ˚C Tamb = 100 ˚C Tamb = 25 ˚C Tamb = 25 ˚C MIN. - 55 MAX. 100 100 15 0.9 0.6 3.6 1.5 150 150 UNIT V V V A A A W ˚C ˚C
THERMAL RESISTANCES
SYMBOL Rth j-b Rth j-amb PARAMETER From junction to board From junction to ambient
1
CONDITIONS Mounted on any PCB Mounted on PCB of Fig.17
MIN. -
TYP. 50 -
MAX. 85
UNIT K/W K/W
1 Temperature measured 1-3 mm from tab.
January 1998
1
Rev 1.000
Philips Semiconductors
Product Specification
PowerMOS transistor Logic level FET
STATIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.1 mA VDS = 100 V; VGS = 0 V; VDS = 100 V; VGS = 0 V; Tj = 125 ˚C VGS = ±15 V; VDS = 0 V VGS = 5 V; ID = 0.9 A MIN. 100 1.0 -
BUK581-100A
TYP. 1.5 1 0.1 10 0.51
MAX. 2.0 10 1.0 100 0.90
UNIT V V µA mA nA Ω
DYNAMIC CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time CONDITIONS VDS = 25 V; ID = 0.9 A VGS = 0 V; VDS = 25 V; f = 1 MHz VDD = 30 V; ID = 3 A; VGS = 5 V; RGS = 50 Ω; Rgen = 50 Ω MIN. 1 TYP. 1.8 180 45 16 6 45 15 20 MAX. 300 60 25 10 55 25 30 UNIT S pF pF pF ns ns ns ns
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS IF = 0.9 A; VGS = 0 V IF = 0.9 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 30 V MIN. TYP. 0.85 40 100 MAX. 0.9 3.6 1.1 UNIT A A V ns nC
AVALANCHE LIMITING VALUE
SYMBOL WDSS PARAMETER Drain-source non-repetitive unclamped inductive turn-off energy CONDITIONS ID = 0.9 A; VDD ≤ 25 V; VGS = 5 V; RGS = 50 Ω; Tamb = 25 ˚C MIN. TYP. MAX. 10 UNIT mJ
January 1998
2
Rev 1.000
Philips Semiconductors
Product Specification
PowerMOS transistor Logic level FET
BUK581-100A
120 110 100 90 80 70 60 50 40 30 20 10 0
PD%
Normalised Power Derating
10
ID / A
S/ ID
BUK581-100A
1
RD
S
N (O
)=
VD
tp = 100 us 1 ms 10 ms
0.1
DC
100 ms 1s 10 s
0.01
0 20 40 60 80 Tamb / C 100 120 140
1
10
VDS / V
100
Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tamb)
ID% Normalised Current Derating
Fig.4. Safe operating area Tamb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp
BUK581-100A 10 4.5 5
120 110 100 90 80 70 60 50 40 30 20 10 0
5
ID / A
4
4
3
3.5
2 3 1 VGS / V = 2.5
0 20 40 60 80 Tamb / C 100 120 140
0 0 2 4 VDS / V 6 8 10
Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tamb); conditions: VGS ≥ 5 V
Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS
RDS(ON) / Ohm 2.5 3 3.5 BUK581-100A 4
1E+02
Zth j-amb / (K/W) D= 0.5 0.2 0.1 0.05 0.02
BUKX81
2 1.8 1.6 1.4 1.2 1
1E+01
1E+00
P D tp D= tp T
4.5 5 VGS / V = 10
0.8 0.6
1E-01
T t
0.4 0.2 0
1E-05 1E-03 t/s 1E-01 1E+01 1E+03
1E-02 1E-07
0
1
2 ID / A
3
4
5
Fig.3. Transient thermal impedance. Zth j-amb = f(t); parameter D = tp/T
Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS
January 1998
3
Rev 1.000
Philips Semiconductors
Product Specification
PowerMOS transistor Logic level FET
BUK581-100A
5
ID / A
BUK581-100A Tj / C = 25
VGS(TO) / V max. 2
4
150
typ.
3
min. 1
2
1
0 0 1 2 VGS / V 3 4 5
0 -60 -40 -20 0 20 40 60 Tj / C 80 100 120 140
Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
gfs / S BUK581-100A
Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 0.1 mA; VDS =.