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BUK564-60H Dataheets PDF



Part Number BUK564-60H
Manufacturers NXP
Logo NXP
Description PowerMOS transistor Logic level FET
Datasheet BUK564-60H DatasheetBUK564-60H Datasheet (PDF)

Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in automotive and general purpose switching applications. BUK564-60H QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-s.

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Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic envelope suitable for surface mount applications. The device is intended for use in automotive and general purpose switching applications. BUK564-60H QUICK REFERENCE DATA SYMBOL VDS ID Ptot Tj RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V MAX. 60 39 125 175 42 UNIT V A W ˚C mΩ PINNING - SOT404 PIN 1 2 3 mb gate drain DESCRIPTION PIN CONFIGURATION mb SYMBOL d g source drain 1 2 3 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDGR ±VGS ±VGSM ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 kΩ tp ≤ 50 µs Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 MAX. 60 60 15 20 39 28 156 125 175 175 UNIT V V V V A A A W ˚C ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS TYP. Minimum footprint, FR4 board 50 MAX. 1.2 UNIT K/W K/W August 1996 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IDSS IGSS RDS(ON) PARAMETER Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 1 mA VDS = 60 V; VGS = 0 V; Tj = 25 ˚C VDS = 60 V; VGS = 0 V; Tj =125 ˚C VGS = ±15 V; VDS = 0 V VGS = 5 V; ID = 20 A MIN. 60 1.0 - BUK564-60H TYP. 1.5 1 0.1 10 35 MAX. 2.0 10 1.0 100 42 UNIT V V µA mA nA mΩ DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL gfs Ciss Coss Crss td on tr td off tf Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal source inductance CONDITIONS VDS = 25 V; ID = 20 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 10 TYP. 18 1100 420 160 25 110 150 100 2.5 7.5 MAX. 1750 600 275 40 150 220 145 UNIT S pF pF pF ns ns ns ns nH nH VDD = 30 V; ID = 3 A; VGS = 5 V; RGS = 50 Ω; Rgen = 50 Ω Measured from upper edge of drain tab to centre of die Measured from source lead soldering point to source bond pad REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL IDR IDRM VSD trr Qrr PARAMETER Continuous reverse drain current Pulsed reverse drain current Diode forward v.


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