BUK553-48C

Philips Semiconductors Product specification PowerMOS transistor Voltage clamped logic level FET GENERAL DESCRIPTION Protected N-channel enhancement mode logic level field-effect power transistor in a plastic envelope. The device is intended for use in automotive applications. It has built-in zener diodes providing active drain voltage clamping. BUK553-48C QUICK REFERENCE DATA SYMBOL V(CL)DSR ID Ptot Tj WDSRR RDS(ON) PARAMETER Drain-source clamp voltage Drain current (DC) Total power dissipation Junction temperature Repetitive clamped turn off energy; Tj = 150˚C Drain-source on-state resistance; VGS = 5 V MIN. 40 TYP. 48 MAX. UNIT 58 21 75 175 50 85 V A W ˚C mJ mΩ PINNING - TO220AB PIN 1 2 3 tab gate drain source drain DESCRIPTION PIN CONFIGURATION tab SYMBOL d g 1 23 s LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VDS VDG ±VGS ID ID IDM Ptot Tstg Tj PARAMETER Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction Temperature CONDITIONS continuous continuous Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C MIN. - 55 - 55 MAX. 30 30 15 21 15 84 75 175 175 UNIT V V V A A A W ˚C ˚C THERMAL RESISTANCES SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to heatsink Thermal resistance junction to ambient CONDITIONS with heatsink compound MIN. TYP. 60 MAX. 2 UNIT K/W K/W August 1994 ...