MC10104

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quad 2-Input AND Gate The MC10104 is a quad 2–input AND gate. One of the gates has both AND/NAND outputs available. MC10104 PD = 35 mW typ/gate (No Load) tpd = 2.7 ns typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 4 2 5 6 3 7 10 14 11 12 9 13 15 VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 DIP PIN ASSIGNMENT VCC1 AOUT BOUT AIN AIN BIN BIN VEE 1 2 3 4 5 6 7 8 16 VCC2 15 DOUT 14 COUT 13 DIN 12 DIN 11 CIN 10 CIN 9 DOUT Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). 3/93 © Motorola, Inc. 1996 3–16 REV 5 MC10104 ELECTRICAL CHARACTERISTICS Characteristic Symbol Pin Under Test –30°C Min Max Power Supply Drain Current Input Current IE IinH* 8 12 13 39 425 350 Output Voltage Logic 1 IinL VOH 12 0.5 15 –1.060...