MCM69L818A

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 4M Late Write HSTL The MCM69L736A/818A is a 4M synchronous late write fast static RAM designed to provide high performance in secondary cache and ATM switch, Telecom, and other high speed memory applications. The MCM69L818A (organized as 256K words by 18 bits) and the MCM69L736A (organized as 128K words by 36 bits) are fabricated in Motorola’s high performance silicon gate BiCMOS technology. The differential clock (CK) inputs control the timing of read/write operations of the RAM. At the rising edge of CK, all addresses, write enables, and synchronous selects are registered. An internal buffer and special logic enable the memory to accept write data on the rising edge of CK a cycle after address and control signals. Read data is available at the falling edge of CK. The RAM uses HSTL inputs and outputs. The adjustable input trip–point (Vref) and output voltage (VDDQ) gives the system designer greater flexibility in optimizing...