AD9523

Data Sheet Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs AD9523 FEATURES Output frequency: <1 MHz to 1 GHz Start-up frequency accuracy: <±100 ppm (determined by VCXO reference accuracy) Zero delay operation Input-to-output edge timing: <150 ps 14 outputs: configurable LVPECL, LVDS, HSTL, and LVCMOS 14 dedicated output dividers with jitter-free adjustable delay Adjustable delay: 63 resolution steps of ½ period of VCO output divider Output-to-output skew: <50 ps Duty cycle correction for odd divider settings Automatic synchronization of all outputs on power-up Absolute output jitter: <200 fs at 122.88 MHz Integration range: 12 kHz to 20 MHz Distribution phase noise floor: −160 dBc/Hz Digital lock detect Nonvolatile EEPROM stores configuration settings SPI- and I²C-compatible serial control port Dual PLL architecture PLL1 Low bandwidth for reference input clock cleanup with external VCXO Phase detector rate up to130 MHz Redundant reference inputs Auto...