MCM67J618

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 64K x 18 Bit BurstRAMTM Synchronous Fast Static RAM With Burst Counter and Registered Outputs MCM67J618 The MCM67J618 is a 1,179,648 bit synchronous static random access memory de- signed to provide a burstable, high-performance, secondary cache for the i486™ and Pentium™ microprocessors. It is organized as 65,536 words of 18 bits, fabricated with Motorola's high-performance silicon-gate BiCMOS technology. The device integrates input FNPACKAGE PLASTIC CASE 778 registers, a 2-bit counter, high speed SRAM, and high drive registered output drivers onto a single monolithic circuit for reduced parts count implementation of cache data RAM ap- plications. Synchronous design allows precise cycle control with the use of an external clock (K). BiCMOS circuitry reduces the overall power consumption of the integrated func- PIN ASSIGNMENT tions for greater reliability. Addresses (AO - A15), data inputs (DO - D17), and all contr...