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DSPRAMTM
8K X 24 Bit Fast Static RAM
The MCM56824AZP is a 196,608 bit static random access memory organized as 8,192 words of 24 bits, fabricated using Motorola's high-performance silicon-gate CMOS technology. The device integrates an 8K x 24 SRAM core with multiple chip enable inputs, output enable, and an externally controlled single address pin multiplexer. These functions allow for direct connection to the Motorola DSP56001 Digital Signal Processor and provide a very efficient means for implementation of a reduced parts count system requiring no additional interface logic.
The availability of multiple chip enable (Ef and E2) and output enable (<3) inputs
provides for greater system flexibility when multiple devices are used. With either chip enable input unasserted, the device will enter standby mode, useful in low-
power applications. A single on-chip multiplexer selects A12 or XIY as the highest order address input dependi.