ST92195D7

ST92195 ST92T195 ST92E195 48-96 Kbyte ROM HCMOS MCU WITH ON-SCREEN DISPLAY AND TELETEXT DATA SLICER s Register File based 8/16 bit Core Architecture with RUN, WFI, SLOW and HALT modes s 0°C to +70°C operating temperature range s Up to 24 MHz. operation @ 5V±10% s Min. instruction cycle time: 165ns at 24 MHz. s 48, 56, 64, 84 or 96 Kbytes ROM s 256 bytes RAM of Register file (accumulators or index registers) s 256 to 512 bytes of on-chip static RAM )s 2 or 8 Kbytes of TDSRAM (Teletext and Display t(sStorage RAM) cs 28 fully programmable I/O pins us Serial Peripheral Interface rods Flexible Clock controller for OSD, Data Slicer and Core clocks running from a single low Pfrequency external crystal. tes Enhanced display controller with 26 rows of 40/80 characters ole– 2 sets of 512 characters s– Serial and Parallel attributes b– 10x10 dot matrix, definable by user - O– 4/3 and 16/9 supported in 50/60Hz and 100/ )120 Hz mode t(s– Rounding, fringe, double width, double h...