Document
MCP6V06/7/8
300 µA, Auto-Zeroed Op Amps
Features
• High DC Precision: - VOS Drift: ±50 nV/°C (maximum) - VOS: ±3 µV (maximum) - AOL: 125 dB (minimum) - PSRR: 125 dB (minimum) - CMRR: 120 dB (minimum) - Eni: 1.7 µVP-P (typical), f = 0.1 Hz to 10 Hz - Eni: 0.54 µVp-p (typical), f = 0.01 Hz to 1 Hz
• Low Power and Supply Voltages: - IQ: 300 µA/amplifier (typical) - Wide Supply Voltage Range: 1.8V to 5.5V
• Easy to Use: - Rail-to-Rail Input/Output - Gain Bandwidth Product: 1.3 MHz (typical) - Unity Gain Stable - Available in Single and Dual - Single with Chip Select (CS): MCP6V08
• Extended Temperature Range: -40°C to +125°C
Typical Applications
• Portable Instrumentation • Sensor Conditioning • Temperature Measurement • DC Offset Correction • Medical Instrumentation
Design Aids
• SPICE Macro Models • FilterLab® Software • Mindi™ Circuit Designer & Simulator • Microchip Advanced Part Selector (MAPS) • Analog Demonstration and Evaluation Boards • Application Notes
Related Parts
• MCP6V01/2/3: Spread clock, lower offset
Description
The Microchip Technology Inc. MCP6V06/7/8 family of operational amplifiers has input offset voltage correction for very low offset and offset drift. These devices have a wide gain bandwidth product (1.3 MHz, typical) and strongly reject switching noise. They are unity gain stable, have no 1/f noise, and have good PSRR and CMRR. These products operate with a single supply voltage as low as 1.8V, while drawing 300 µA/amplifier (typical) of quiescent current.
The Microchip Technology Inc. MCP6V06/7/8 op amps are offered in single (MCP6V06), single with Chip Select (CS) (MCP6V08), and dual (MCP6V07). They are designed in an advanced CMOS process.
Package Types (top view)
MCP6V06 SOIC
MCP6V06 2x3 TDFN *
NC 1
8 NC
NC 1
8 NC
VIN– 2 VIN+ 3 VSS 4
7 VDD
VIN– 2 EP 7 VDD
6 VOUT VIN+ 3
9
6 VOUT
5 NC
VSS 4
5 NC
MCP6V07 SOIC
MCP6V07 4x4 DFN *
VOUTA 1 VINA– 2 VINA+ 3
VSS 4
8 VDD VOUTA 1
8 VDD
7 VOUTB VINA– 2 EP 7 VOUTB
6 VINB– VINA+ 3
9
6 VINB–
5 VINB+ VSS 4
5 VINB+
MCP6V08 SOIC
MCP6V08 2x3 TDFN *
NC 1
VIN– 2 VIN+ 3 VSS 4
8 CS
NC 1
8 CS
7 VDD VIN– 2 EP 7 VDD
6 VOUT VIN+ 3
9
6 VOUT
5 NC
VSS 4
5 NC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2008 Microchip Technology Inc.
DS22093B-page 1
MCP6V06/7/8
Typical Application Circuit
R1 VIN
R2
R2 VDD/2
R3 VOUT
C2 3 kΩ
MCP6XXX
MCP6V06
Offset Voltage Correction for Power Driver
DS22093B-page 2
© 2008 Microchip Technology Inc.
MCP6V06/7/8
1.0
ELECTRICAL CHARACTERISTICS
1.1 Absolute Maximum Ratings †
VDD – VSS .......................................................................6.5V Current at Input Pins ....................................................±2 mA Analog Inputs (VIN+ and VIN–) †† ... VSS – 1.0V to VDD+1.0V All other Inputs and Outputs ............ VSS – 0.3V to VDD+0.3V Difference Input voltage ...................................... |VDD – VSS| Output Short Circuit Current ................................ Continuous Current at Output and Supply Pins ............................±30 mA Storage Temperature ...................................-65°C to +150°C Max. Junction Temperature ........................................ +150°C ESD protection on all pins (HBM, MM) ................≥ 4 kV, 300V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
†† See Section 4.2.1 “Rail-to-Rail Inputs”.
1.2 Specifications
TABLE 1-1: DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/3, VOUT = VDD/2, VL = VDD/2, RL = 20 kΩ to VL, and CS = GND (refer to Figure 1-5 and Figure 1-6).
Parameters
Sym
Min
Typ
Max Units
Conditions
Input Offset
Input Offset Voltage Input Offset Voltage Drift with Temperature
(linear Temp. Co.) Input Offset Voltage Quadratic Temp. Co. Power Supply Rejection
VOS TC1
TC2 PSRR
-3
—
+3
µV TA = +25°C (Note 1)
-50
—
+50
nV/°C TA = -40 to +125°C
(Note 1)
—
±0.15
—
nV/°C2 TA = -40 to +125°C
125
142
—
dB (Note 1)
Input Bias Current and Impedance
Input Bias Current Input Bias Current across Temperature
Input Offset Current Input Offset Current across Temperature
Common Mode Input Impedance Differential Input Impedance Common Mode
IB IB IB IOS IOS IOS ZCM ZDIFF
— — — — — -1000 — —
+6 +140 +1500 -85 -85 -190 1013||6 1013||6
— — +5000 — — 1000 — —
pA pA pA pA pA pA Ω||pF Ω||pF
TA = +85°C TA = +125°C
TA = +85°C TA = +125°C
Common-Mode Input Voltage Range Common-Mode Rejection
VCMR.