CD4089BMS

CD4089BMS December 1992 CMOS Binary Rate Multiplier conjunction with an up/down counter and control logic used to perform arithmetic operations (adds, subtract, divide, raise to a power), solve algebraic and differential equations, generate natural logarithms and trigometric functions, A/D and D/A conversions, and frequency division. For words of more than 4 bits, CD4089BMS devices may be cascaded in two different modes: an Add mode and a Multiply mode (see Figures 3 and 4). In the Add mode some of the gaps left by the more significant unit at the count of 15 are filled in by the less significant units. For example, when two units are cascaded in the Add mode and programmed to 11 and 13, respectively, the more significant unit will have 11 output pulses for every 16 input pulses and the other unit will have 13 output pulses for every 256 input pulses for a total of 11 16 + 13 189 = 256 256 Features High Voltage Type (20V Rating) Cascadable in Multiples of 4 Bits Set to “15” Input and “15” Detect Output 100% Tested for Quiescent Current at 20V 5V, 10V and 15V Parametric Ratings Standardized Symmetrical Output Characteristics Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” In the Mult...