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CD4070BMS Dataheets PDF



Part Number CD4070BMS
Manufacturers Intersil Corporation
Logo Intersil Corporation
Description CMOS Quad Exclusive OR and Exclusive NOR Gates
Datasheet CD4070BMS DatasheetCD4070BMS Datasheet (PDF)

CD4070BMS CD4077BMS December 1992 CMOS Quad Exclusive OR and Exclusive NOR Gates Pinouts A 1 B 2 Features • High Voltage Types (20V Rating) • CD4070BMS - Quad Exclusive OR Gate • CD4077BMS - Quad Exclusive NOR Gate • Medium Speed Operation - tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF • 5V, 10V and 15V Parametric Ratings • Standardized, Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 1.

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CD4070BMS CD4077BMS December 1992 CMOS Quad Exclusive OR and Exclusive NOR Gates Pinouts A 1 B 2 Features • High Voltage Types (20V Rating) • CD4070BMS - Quad Exclusive OR Gate • CD4077BMS - Quad Exclusive NOR Gate • Medium Speed Operation - tPHL, tPLH = 65ns (Typ.) at VDD = 10V, CL = 50pF • 5V, 10V and 15V Parametric Ratings • Standardized, Symmetrical Output Characteristics • 100% Tested for Quiescent Current at 20V • Maximum Input Current of 1µA at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC • Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V • Meets All Requirements of JEDEC Tentative Standard No. 13B, “Standard Specifications for Description of ‘B’ Series CMOS Devices” CD4070BMS TOP VIEW 14 VDD 13 H 12 G 11 M = G⊕H 10 L = E⊕F 9 F 8 E J = A⊕B 3 K = C⊕D 4 C 5 D 6 VSS 7 CD4077BMS TOP VIEW A 1 B 2 J = A⊕B 3 K = C⊕D 4 C 5 D 6 VSS 7 14 VDD 13 H 12 G 11 M = G⊕H 10 L = E⊕F 9 F 8 E Applications • Logical Comparators • Parity Generators and Checkers • Adders/Subtractors Functional Diagram A J = A⊕B K = C⊕D M = G⊕H L = E⊕F VSS = 7 VDD = 14 B C D E F G H 1 2 5 6 8 9 12 13 10 4 3 J K Description CD4070BMS contains four independent Exclusive OR gates. The CD4077BMS contains four independent Exclusive NOR gates. The CD4070BMS and CD4077BMS provide the system designer with a means for direct implementation of the Exclusive OR and Exclusive NOR functions, respectively. The CD4070BMS and CD4077BMS are supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack *CD4070B Only H4Q H1B *H4F †H3W L 11 M CD4070BMS A B J = A⊕B K = C⊕D M = G⊕H L = E⊕F C D E F G H 1 2 5 6 8 9 12 13 10 4 3 J K †CD4077B Only L 11 M CD4077BMS CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999 File Number 3322 7-455 Specifications CD4070BMS, CD4077BMS Absolute Maximum Ratings DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for 10s Maximum Reliability Information Thermal Resistance . . . . . . . . . . . . . . . . θja θjc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage Current IIL VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Input Leakage Current IIH VIN = VDD or GND VDD = 20 3 1 2 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10µA VSS = 0V, IDD = 10µA VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 LIMITS TEMPERATURE +25 oC PARAMETER Supply Current SYMBOL IDD CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND MIN -100 -1000 -100 - MAX 2 200 2 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8 UNITS µA µA µA nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V +125oC -55oC +25o C +125oC -55oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 14.95 +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -5.


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