CD4043BC

CD4043BM CD4043BC Quad TRI-STATE NOR R S Latches CD4044BM CD4044BC Quad TRI-STATE NAND R S Latches February 1988 CD4043BM CD4043BC Quad TRI-STATE NOR R S Latches CD4044BM CD4044BC Quad TRI-STATE NAND R S Latches General Description CD4043BM CD4043BC are quad cross-couple TRI-STATE CMOS NOR latches and CD4044BM CD4044BC are quad cross-couple TRI-STATE CMOS NAND latches Each latch has a separate Q output and individual SET and RESET inputs There is a common TRI-STATE ENABLE input for all four latches A logic ‘‘1’’ on the ENABLE input connects the latch states to the Q outputs A logic ‘‘0’’ on the ENABLE input disconnects the latch states from the Q outputs resulting in an open circuit condition on the Q output The TRI-STATE feature allows common bussing of the outputs Features Y Y Y Y Y Y Wide supply voltage range 3V to 15V Low power 100 nW (typ ) High noise immunity 0 45 VDD (typ ) Separate SET and RESET inputs for each latch NOR and NAND configuration TRI-STATE output with common output enable Applications Y Y Y Y Multiple bus storage Strobed register Four bits of independent storage with output enable General digital logic Connection Diagrams CD4043BM CD4043BC Dual-In-Line and Flat Packages CD4044BM CD4044BC Dual-In-Line and Flat Packages TL F 5967 – 3 TL F 5967 – 4 Top View Top View Order Number CD4043B or CD4044B Truth Table CD4043BM CD4043BC S X 0 1 0 1 R X 0 0 1 1 E 0 1 1 1 1 Q OC NC 1 0 D CD4044BM CD4044BC S X 1 0 1 0 R X 1 1 0 0 E 0 1 1 1 1 Q OC NC 1 0 DD ...