CD4030C

CD4030M CD4030C Quad EXCLUSIVE-OR Gate February 1988 CD4030M CD4030C Quad EXCLUSIVE-OR Gate General Description The EXCLUSIVE-OR gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and Pchannel enhancement mode transistors All inputs are protected against static discharge with diodes to VDD and VSS Applications Y Y Y Y Y Features Y Y Y Y Y Y Wide supply voltage range 3 0V to 15V Low power 100 nW (typ ) Medium speed tPHL e tPLH e 40 ns (typ ) operation at CL e 15 pF 10V supply High noise immunity 0 45 VCC (typ ) Automotive Data terminals Instrumentation Medical electronics Industrial controls Remote metering Computers Schematic Diagram TL F 5961 – 1 Connection Diagram Dual-In-Line Package TL F 5961 – 2 Order Number CD4030 C1995 National Semiconductor Corporation TL F 5961 RRD-B30M105 Printed in U S A Absolute Maximum Ratings If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Voltage at Any Pin (Note 1) Operating Temperature Range CD4030M CD4030C VSS b0 3V to VSS a 15 5V b 55 C to a 125 C b 40 C to a 85 C Storage Temperature Range Power Dissipation (PD) Dual-In-Line Small Outline Operating VDD Range Lead Temperature (Soldering 10 seconds) b 65 C to a 150 C 700 mW 500 mW VSS a 3 0V to VSS a 15V 260 C DC Electrical Characteristics CD4030M Limits Symbol Parameter Conditions Min IL PD VOL VOH VNL VNH IDN IDP II Quiescent Devic...