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SN74LS113A

Motorola
Part Number SN74LS113A
Manufacturer Motorola
Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
Published Jan 9, 2017
Detailed Description DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs. These monol...
Datasheet PDF File SN74LS113A PDF File

SN74LS113A
SN74LS113A

Overview
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS113A offers individual J, K, set, and clock inputs.
These monolithic dual flip-flops are designed so that when the clock goes HIGH, the inputs are enabled and data will be accepted.
The logic level of the J and K inputs may be allowed to change when the clock pulse is HIGH and the bistable will perform according to the truth table as long as minimum setup times are observed.
Input data is transferred to the outputs on the negative-going edge of the clock pulse.
SN54/74LS113A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP LOW POWER SCHOTTKY LOGIC DIAGRAM (Each Flip-Flop) Q 5(9) J 3(11) 1(13) CLOCK (CP) Q 6(8) SET (SD) 4(10) K 2(12) MOD...


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